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MAX1436B PDF预览

MAX1436B

更新时间: 2024-11-19 11:18:39
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美信 - MAXIM /
页数 文件大小 规格书
24页 366K
描述
Octal, 12-Bit, 40Msps, 1.8V ADC with Serial LVDS Outputs

MAX1436B 技术参数

生命周期:Active包装说明:14 X 14 MM, 1 MM HEIGHT, MS-026, TQFP-100
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.74转换器类型:ADC, ONE BIT COMPARATOR
JESD-30 代码:S-PQFP-G100长度:14 mm
最大线性误差 (EL):0.0732%模拟输入通道数量:8
位数:12功能数量:1
端子数量:100最高工作温度:85 °C
最低工作温度:-40 °C输出位码:BINARY, 2'S COMPLEMENT BINARY
输出格式:SERIAL封装主体材料:PLASTIC/EPOXY
封装代码:TFQFP封装形状:SQUARE
封装形式:FLATPACK, THIN PROFILE, FINE PITCH采样速率:40 MHz
采样并保持/跟踪并保持:TRACK座面最大高度:1.2 mm
标称供电电压:1.8 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
宽度:14 mmBase Number Matches:1

MAX1436B 数据手册

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19-0523; Rev 1; 2/11  
Octal, 12-Bit, 40Msps, 1.8V ADC  
with Serial LVDS Outputs  
MAX1436B  
General Description  
Features  
The MAX1436B octal, 12-bit analog-to-digital converter  
(ADC) features fully differential inputs, a pipelined  
architecture, and digital error correction incorporating a  
fully differential signal path. This ADC is optimized for  
low-power and high-dynamic performance in medical  
imaging instrumentation and digital communications  
applications. The MAX1436B operates from a 1.8V sin-  
gle supply and consumes only 743mW (93mW per  
channel) while delivering a 69.9dB (typ) signal-to-noise  
ratio (SNR) at a 5.3MHz input frequency. In addition to  
low operating power, the MAX1436B features a low-  
power standby mode for idle periods.  
o Excellent Dynamic Performance  
69.9dB SNR at 5.3MHz  
96dBc SFDR at 5.3MHz  
95dB Channel Isolation  
o Ultra-Low Power  
93mW per Channel (Normal Operation)  
Fast 200μs Wake-Up Time from Standby  
o Serial LVDS Outputs  
o Pin-Selectable LVDS/SLVS (Scalable Low-Voltage  
Signal) Mode  
An internal 1.24V precision bandgap reference sets the  
full-scale range of the ADC. A flexible reference struc-  
ture allows the use of an external reference for applica-  
tions requiring increased accuracy or a different input  
voltage range. The reference architecture is optimized  
for low noise.  
o LVDS Outputs Support Up to 30 Inches FR-4  
Backplane Connections  
o Test Mode for Digital Signal Integrity  
o Fully Differential Analog Inputs  
o Wide Differential Input Voltage Range (1.4V  
)
P-P  
A single-ended clock controls the data-conversion  
process. An internal duty-cycle equalizer compensates  
for wide variations in clock duty cycle. An on-chip PLL  
generates the high-speed serial low-voltage differential  
signal (LVDS) clock.  
o On-Chip 1.24V Precision Bandgap Reference  
o Clock Duty-Cycle Equalizer  
o Compact, 100-Pin TQFP Package with Exposed  
Pad  
The MAX1436B has self-aligned serial LVDS outputs for  
data, clock, and frame-alignment signals. The output  
data is presented in two’s complement or binary format.  
o Evaluation Kit Available (Order MAX1436BEVKIT)  
The MAX1436B offers a maximum sample rate of  
40Msps. See the Pin-Compatible Versions table below  
for higher-speed versions. This device is available in a  
small, 14mm x 14mm x 1mm, 100-pin TQFP package  
with exposed pad and is specified for the extended  
industrial (-40°C to +85°C) temperature range.  
Ordering Information  
PART  
TEMP RANGE PIN-PACKAGE  
100 TQFP-EP*  
(14mm x 14mm x 1mm)  
MAX1436BECQ+D -40°C to +85°C  
+Denotes a lead(Pb)-free/RoHS-compliant package.  
D = Dry pack.  
*EP = Exposed pad.  
Applications  
Ultrasound and Medical Imaging  
Instrumentation  
Multichannel Communications  
Pin-Compatible Versions  
SAMPLING  
RATE (Msps)  
RESOLUTION  
(Bits)  
POWER-  
SAVE MODE  
PART  
MAX1434  
MAX1436  
MAX1436B  
MAX1437  
MAX1438  
50  
40  
40  
50  
65  
10  
12  
12  
12  
12  
Power-down  
Power-down  
Standby  
Power-down  
Power-down  
Pin Configuration appears at the end of data sheet.  
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,  
or visit Maxim’s website at www.maxim-ic.com.  

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