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MAX105ECS+T

更新时间： 2024-02-22 23:36:25
品牌 Logo 应用领域
美信 - MAXIM 转换器
页数 文件大小 规格书
21页 669K
描述
ADC, Flash Method, 6-Bit, 1 Func, 2 Channel, Parallel, Word Access, PQFP80, 12 X 12 MM, 1 MM HEIGHT, ROHS COMPLIANT, TQFP-80

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MAX105ECS+T 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFP
包装说明：HTFQFP,针数：80
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：12 weeks
风险等级：5.45最大模拟输入电压：0.84 V
最小模拟输入电压：0.76 V转换器类型：ADC, FLASH METHOD
JESD-30 代码：S-PQFP-G80JESD-609代码：e3
长度：12 mm最大线性误差 (EL)：1.5625%
湿度敏感等级：3模拟输入通道数量：2
位数：6功能数量：1
端子数量：80最高工作温度：85 °C
最低工作温度：-40 °C输出位码：2'S COMPLEMENT BINARY
输出格式：PARALLEL, WORD封装主体材料：PLASTIC/EPOXY
封装代码：HTFQFP封装形状：SQUARE
封装形式：FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH峰值回流温度（摄氏度）：260
认证状态：Not Qualified采样速率：800 MHz
座面最大高度：1.2 mm标称供电电压：5 V
表面贴装：YES温度等级：INDUSTRIAL
端子面层：TIN端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：12 mm
Base Number Matches：1

MAX105ECS+T 数据手册

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19-2006; Rev 0; 5/01  
Dual, 6-Bit, 800Msps ADC with On-Chip,  
Wideband Input Amplifier  
General Description  
Features  
The MAX105 is a dual, 6-bit, analog-to-digital converter  
(ADC) designed to allow fast and precise digitizing of  
in-phase (I) and quadrature (Q) baseband signals. The  
MAX105 converts the analog signals of both I and Q  
components to digital outputs at 800Msps while achiev-  
ing a signal-to-noise ratio (SNR) of typically 37dB with  
an input frequency of 200MHz, and an integral nonlin-  
earity (INL) and differential nonlinearity (DNL) of 0.25  
LSB. The MAX105 analog input preamplifiers feature a  
400MHz, -0.5dB, and a 1.5GHz, -3dB analog input  
bandwidth. Matching channel-to-channel performance  
is typically 0.04dB gain, 0.1LSB offset, and 0.2 degrees  
phase. Dynamic performance is 36.4dB signal-to-noise  
plus distortion (SINAD) with a 200MHz analog input sig-  
nal and a sampling speed of 800MHz. A fully differen-  
tial comparator design and encoding circuits reduce  
out-of-sequence errors, and ensure excellent  
metastable performance of only one error per 1016 clock  
cycles.  
ꢀ Two Matched 6-Bit, 800Msps ADCs  
ꢀ Excellent Dynamic Performance  
36.4dB SINAD at f ≈ 200MHz and  
IN  
f
≈ 800MHz  
CLK  
ꢀ Typical INL and DNL: 0.2ꢀLSB  
ꢀ Channel-to-Channel Phase Matching: 0.2ꢁ  
ꢀ Channel-to-Channel Gain Matching: 0.04dB  
ꢀ 6:12 Demultiplexer reduces the Data Rates to  
400MHz  
ꢀ Low Error Rate: 1016 Metastable States at  
800Msps  
ꢀ LVDS Digital Outputs in Two’s Complement  
Format  
In addition, the MAX105 provides LVDS digital outputs  
with an internal 6:12 demultiplexer that reduces the out-  
put data rate to one-half the sample clock rate. Data is  
output in two’s complement format. The MAX105 oper-  
ates from a +5V analog supply and the LVDS output  
ports operate at +3.3V. The data converter’s typical  
power dissipation is 2.6W. The device is packaged in  
an 80-pin, TQFP package with exposed paddle, and is  
specified for the extended (-40°C to +85°C) tempera-  
ture range. For a lower-speed, 400Msps version of the  
MAX105, please refer to the MAX107 data sheet.  
Ordering Information  
PART  
TEMP. RANGE  
PIN-PACKAGE  
MAX105ECS  
-40°C to +85°C  
80-Pin TQFP-EP  
Block Diagram  
I
Applications  
PRIMARY  
PORT  
VSAT Receivers  
WLANs  
I ADC  
I
AUXILIARY  
PORT  
Test Instrumentation  
Communications Systems  
MAX107  
REF  
Q
PRIMARY  
PORT  
Q ADC  
Q
AUXILIARY  
PORT  
Pin Configuration appears at end of data sheet.  
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at  
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.  
1234567...21

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MAX105ECS+T 替代型号

型号 品牌 替代类型 描述 数据表
MAX105ECS+ MAXIM

类似代替

 ADC, Flash Method, 6-Bit, 1 Func, 2 Channel, Parallel, Word Access, PQFP80, 12 X 12 MM, 1
MAX105ECS MAXIM

类似代替

 Dual, 6-Bit, 800Msps ADC with On-Chip, Wideband Input Amplifier

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