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MACH111SP-15VC PDF预览

MACH111SP-15VC

更新时间: 2024-10-27 22:51:31
品牌 Logo 应用领域
莱迪思 - LATTICE 可编程逻辑器件输入元件时钟
页数 文件大小 规格书
48页 1080K
描述
High-Performance EE CMOS Programmable Logic

MACH111SP-15VC 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:TQFP-44Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.7其他特性:YES
最大时钟频率:50 MHz系统内可编程:YES
JESD-30 代码:S-PQFP-G44JESD-609代码:e0
JTAG BST:NO长度:10 mm
湿度敏感等级:3专用输入次数:2
I/O 线路数量:64宏单元数:32
端子数量:44最高工作温度:70 °C
最低工作温度:组织:2 DEDICATED INPUTS, 64 I/O
输出函数:MACROCELL封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装等效代码:TQFP44,.47SQ,32
封装形状:SQUARE封装形式:FLATPACK
峰值回流温度(摄氏度):240电源:5 V
可编程逻辑类型:EE PLD传播延迟:15 ns
认证状态:Not Qualified子类别:Programmable Logic Devices
最大供电电压:5.25 V最小供电电压:4.75 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:10 mm
Base Number Matches:1

MACH111SP-15VC 数据手册

 浏览型号MACH111SP-15VC的Datasheet PDF文件第2页浏览型号MACH111SP-15VC的Datasheet PDF文件第3页浏览型号MACH111SP-15VC的Datasheet PDF文件第4页浏览型号MACH111SP-15VC的Datasheet PDF文件第5页浏览型号MACH111SP-15VC的Datasheet PDF文件第6页浏览型号MACH111SP-15VC的Datasheet PDF文件第7页 
MACH 1 and 2 CPLD Families  
High-Performance EE CMOS Programmable Logic  
FEATURES  
  High-performance electrically-erasable CMOS PLD families  
  32 to 128 macrocells  
  44 to 100 pins in cost-effective PLCC, PQFP and TQFP packages  
  SpeedLocking™ – guaranteed fixed timing up to 16 product terms  
  Commercial 5/5.5/6/7.5/10/12/15-ns t and Industrial 7.5/10/12/14/18-ns t  
PD  
PD  
  Configurable macrocells  
— Programmable polarity  
— Registered or combinatorial outputs  
— Internal and I/O feedback paths  
— D-type or T-type flip-ops  
— Output Enables  
— Choice of clocks for each flip-flop  
— Input registers for MACH 2 family  
  JTAG (IEEE 1149.1)-compatible, 5-V in-system programming available  
  Peripheral component interconnect (PCI) compliant at 5/5.5/6/7.5/10/12 ns  
  Safe for mixed supply voltage system designs  
  Bus-Friendly™ inputs and I/Os reduce risk of unw anted oscillatory outputs  
  Programmable pow er-dow n mode results in pow er savings of up to 75%  
  Supported by Vantis DesignDirect™ softw are for rapid logic development  
— Supports HDL design methodologies with results optimized for Vantis  
— Flexibility to adapt to user requirements  
— Software partnerships that ensure customer success  
  Lattice/Vantis and third-party hardw are programming support  
®
Lattice/VantisPRO™ (formerly known as MACHPRO ) software for in-system programmability  
support on PCs and Automated Test Equipment  
— Programming support on all major programmers including Data I/O, BP Microsystems, Advin,  
and System General  
Publication# 1 4051  
Amendment/0  
Rev: K  
Issue Date: November 1 998  

MACH111SP-15VC 替代型号

型号 品牌 替代类型 描述 数据表
M4A5-32/32-5VNC LATTICE

类似代替

EE PLD, 5ns, 32-Cell, CMOS, PQFP44, 1 MM HEIGHT, LEAD FREE, TQFP-44
M4A5-32/32-10VNC LATTICE

类似代替

EE PLD, 10ns, 32-Cell, CMOS, PQFP44, 1 MM HEIGHT, LEAD FREE, TQFP-44

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