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M74HCT74 PDF预览

M74HCT74

更新时间: 2024-11-25 23:01:27
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 触发器
页数 文件大小 规格书
11页 251K
描述
DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR

M74HCT74 数据手册

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M54HCT74  
M74HCT74  
DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR  
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HIGH SPEED  
fMAX = 53 MHz (TYP.) AT VCC = 5 V  
LOW POWER DISSIPATION  
ICC = 2 µA (MAX.) AT TA = 25 °C  
COMPATIBLE WITH TTL OUTPUTS  
VIH = 2V (MIN.) VIL = 0.8V (MAX)  
OUTPUT DRIVE CAPABILITY  
10 LSTTL LOADS  
SYMMETRICAL OUTPUT IMPEDANCE  
IOH = IOL = 4 mA (MIN.)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
PIN AND FUNCTION COMPATIBLE  
B1R  
(Plastic Package)  
F1R  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
WITH 54/74LS74  
ORDER CODES :  
DESCRIPTION  
M54HCT74F1R  
M74HCT74M1R  
The M54/74HCT74 is a high speed CMOS DUAL D  
TYPE FLOP WITH PRESET AND CLEAR fabri-  
cated in silicon gate C2MOS technology. It has the  
same high speed performance of LSTTL combined  
with trueCMOSlow power consumption. A signal on  
the DINPUT is transferred to the Q OUTPUTduring  
the positive going transition of the clock pulse.  
CLEAR and PRESET are independent of the clock  
and accomplished by alow on the appropriate input.  
All inputs are equipped with protection circuits  
against static discharge and transient excess volt-  
age. This integrated circuit has input and output  
characteristics that are fully compatible with 54/74  
LSTTL logic families. M54/74HCT devices are de-  
signed to directly interface HSC2MOS systems with  
TTL and NMOS components. They are also plug in  
replacements for LSTTL devices giving a reduction  
of power consumption.  
M74HCT74B1R  
M74HCT74C1R  
PIN CONNECTIONS (top view)  
INPUT AND OUTPUT EQUIVALENT CIRCUIT  
NC =  
No Internal  
Connection  
February 1993  
1/11  

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