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M74HCT688RM13TR PDF预览

M74HCT688RM13TR

更新时间: 2024-11-23 19:59:43
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
9页 267K
描述
HCT SERIES, 8-BIT IDENTITY COMPARATOR, INVERTED OUTPUT, PDSO20, SO-20

M74HCT688RM13TR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP20,.4针数:20
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.55其他特性:CASCADABLE
系列:HCTJESD-30 代码:R-PDSO-G20
JESD-609代码:e4长度:12.8 mm
负载电容(CL):50 pF逻辑集成电路类型:IDENTITY COMPARATOR
位数:8功能数量:1
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V传播延迟(tpd):48 ns
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:Arithmetic Circuits最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.5 mmBase Number Matches:1

M74HCT688RM13TR 数据手册

 浏览型号M74HCT688RM13TR的Datasheet PDF文件第2页浏览型号M74HCT688RM13TR的Datasheet PDF文件第3页浏览型号M74HCT688RM13TR的Datasheet PDF文件第4页浏览型号M74HCT688RM13TR的Datasheet PDF文件第5页浏览型号M74HCT688RM13TR的Datasheet PDF文件第6页浏览型号M74HCT688RM13TR的Datasheet PDF文件第7页 
M74HCT688  
8 BIT EQUALITY COMPARATOR  
HIGH SPEED:  
= 21ns (TYP.) at V = 4.5V  
t
PD  
CC  
LOW POWER DISSIPATION:  
= 4µA(MAX.) at T =25°C  
I
CC  
A
COMPATIBLE WITH TTL OUTPUTS :  
= 2V (MIN.) V = 0.8V (MAX)  
V
IH  
IL  
DIP  
SOP  
TSSOP  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 4mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
t
t
ORDER CODES  
PACKAGE  
PLH  
PHL  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 688  
TUBE  
T & R  
DIP  
SOP  
M74HCT688B1R  
M74HCT688M1R M74HCT688RM13TR  
M74HCT688TTR  
DESCRIPTION  
The M74HCT688 is an high speed CMOS 8 BIT  
EQUALITY COMPARATOR fabricated with silicon  
TSSOP  
2
gate C MOS technology.  
cascading  
several  
packages  
to  
enable  
comparison of words greater than 8 bits.  
The M74HCT688 compares bit for bit two 8-bit  
words applied on inputs P0 - P7 and inputs Q0 -  
Q7 and indicates whether or not they are equal. A  
single active low enable is provided to facilitate  
All inputs are equipped with protection circuits  
against static discharge and transient excess  
voltage.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
September 2001  
1/9  

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