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M74HCT646RM13TR PDF预览

M74HCT646RM13TR

更新时间: 2024-11-23 20:57:39
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 输入元件光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
15页 392K
描述
HCT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, SOP-24

M74HCT646RM13TR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP24,.4针数:24
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.5其他特性:DIRECTION CONTROL; SELECT INPUT FOR MULTIPLEXED TRANSMISSION OF REGISTERED OR REAL TIME DATA
控制类型:INDEPENDENT CONTROL计数方向:BIDIRECTIONAL
系列:HCTJESD-30 代码:R-PDSO-G24
JESD-609代码:e4长度:15.4 mm
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER最大I(ol):0.006 A
位数:8功能数量:1
端口数量:2端子数量:24
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP24,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
Prop。Delay @ Nom-Sup:65 ns传播延迟(tpd):75 ns
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:N/A触发器类型:POSITIVE EDGE
宽度:7.5 mmBase Number Matches:1

M74HCT646RM13TR 数据手册

 浏览型号M74HCT646RM13TR的Datasheet PDF文件第2页浏览型号M74HCT646RM13TR的Datasheet PDF文件第3页浏览型号M74HCT646RM13TR的Datasheet PDF文件第4页浏览型号M74HCT646RM13TR的Datasheet PDF文件第5页浏览型号M74HCT646RM13TR的Datasheet PDF文件第6页浏览型号M74HCT646RM13TR的Datasheet PDF文件第7页 
M74HCT646  
OCTAL BUS TRANSCEIVER/REGISTER  
WITH 3 STATE OUTPUTS  
HIGH SPEED:  
= 60 MHz (TYP.) at V = 4.5V  
f
MAX  
CC  
LOW POWER DISSIPATION:  
= 4µA(MAX.) at T =25°C  
I
CC  
A
COMPATIBLE WITH TTL OUTPUTS :  
= 2V (MIN.) V = 0.8V (MAX)  
V
IH  
IL  
DIP  
SOP  
TSSOP  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 6mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
t
t
ORDER CODES  
PACKAGE  
PLH  
PHL  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 646  
TBE  
T & R  
DIP  
SOP  
MHCT646B1R  
M74HCT646M1R M74HCT646RM13TR  
M74HCT646TTR  
DESCRIPTION  
TSSOP  
The 74HCT646 is an advanced high-speed  
CMOS OCTAL BUS TRANSCEIVER AND  
REGISTER (3-STATE) fabricated with silicon gate  
select BA) can multiplex stored and real time  
(transparent mode) data. The direction control  
determines which bus will receive data when  
enable G is active (low). In the isolation mode  
(enable G high), "A" data may be stored in one  
register and/or "B" data may be stored in the other  
register. When an output function is disabled, the  
input function is still enabled and may be used to  
store and transmit data. Only one of the two  
buses, A or B, may be driven at a time.  
2
C MOS technology.  
This device consists of bus transceiver circuits  
with 3 state, D-type flip-flops, and control circuitry  
arranged for multiplexed transmission of data  
directly from the input bus or from the internal  
registers. Data on the A or B bus will be clocked  
into register on the low to gh transition of the  
appropriate clock pin (Cck AB or Clock BA).  
Enable (G) and dirction (DIR) pins are provided  
to control the transceiver functions. In the  
transceiver mode, data present at the  
high-impeance port may be stored in either  
registor in both. The select controls (Select AB  
All inputs are equipped with protection circuits  
against static discharge and transient excess  
voltage.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
April 2003  
1/15  

M74HCT646RM13TR 替代型号

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SN74HCT646DWG4 TI

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