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M74HCT646M1R PDF预览

M74HCT646M1R

更新时间： 2024-09-16 22:15:27
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 总线收发器
页数 文件大小 规格书
12页 203K
描述
HCT646 OCTAL BUS TRANSCEIVER/REGISTER 3-STATE HCT648 OCTAL BUS TRANSCEIVER/REGISTER 3-STATE, INV.

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中文翻译

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M74HCT646M1R 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOP, SOP24,.4
针数：24Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.5
其他特性：DIRECTION CONTROL; SELECT INPUT FOR MULTIPLEXED TRANSMISSION OF REGISTERED OR REAL TIME DATA控制类型：INDEPENDENT CONTROL
计数方向：BIDIRECTIONAL系列：HCT
JESD-30 代码：R-PDSO-G24JESD-609代码：e4
长度：15.4 mm负载电容（CL）：150 pF
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER最大I（ol）：0.006 A
位数：8功能数量：1
端口数量：2端子数量：24
最高工作温度：125 °C最低工作温度：-55 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP24,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE包装方法：TUBE
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
Prop。Delay @ Nom-Sup：65 ns传播延迟（tpd）：75 ns
认证状态：Not Qualified座面最大高度：2.65 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
翻译：N/A触发器类型：POSITIVE EDGE
宽度：7.5 mmBase Number Matches：1

M74HCT646M1R 数据手册

 浏览型号M74HCT646M1R的Datasheet PDF文件第2页浏览型号M74HCT646M1R的Datasheet PDF文件第3页浏览型号M74HCT646M1R的Datasheet PDF文件第4页浏览型号M74HCT646M1R的Datasheet PDF文件第5页浏览型号M74HCT646M1R的Datasheet PDF文件第6页浏览型号M74HCT646M1R的Datasheet PDF文件第7页 
M74HCT646  
M74HCT648  
HCT646 OCTAL BUS TRANSCEIVER/REGISTER (3-STATE)  
HCT648 OCTAL BUS TRANSCEIVER/REGISTER (3-STATE, INV.)  
.
HIGH SPEED  
MAX = 60 MHz (TYP.) AT VCC = 5 V  
LOW POWER DISSIPATION  
CC = 4 µA (MAX.) AT TA = 25 °C  
COMPATIBLE WITH TTL OUTPUTS  
VIH = 2V (MIN.) VIL = 0.8V (MAX)  
OUTPUT DRIVE CAPABILITY  
15 LSTTL LOADS  
SYMMETRICAL OUTPUT IMPEDANCE  
IOH = IOL = 6 mA (MIN.)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
PIN AND FUNCTION COMPATIBLE  
WITH 54/74LS646/648  
f
.
.
.
.
.
.
I
B1R  
M1R  
(Plastic Package)  
(Micro Package)  
ORDER CODES :  
M74HCTXXXM1R  
M74HCTXXXB1R  
DESCRIPTION  
The M74HCT646/648 are high speed CMOS  
OCTAL BUS TRANSCEIVERS AND REGISTERS,  
(3-STATE) fabricated in silicon gate C2MOS tech-  
nology. They have the same high speed  
performance of LSTTL combined with true CMOS  
low power consumption. These devices consist of  
bus transceiver circuits with 3-state output, D-type  
flip-flops, and control circuitry arranged for multi-  
plexed transmission of data directly from the input  
bus or from the internal registers. Data on the A or  
B bus will be clocked into the registers on the low-  
to-high transition of the appropriate clock pin (Clock  
AB - or Clock BA). Enable (G) and direction (DIR)  
pins are provided to control the transceiver function-  
s. In the transceiver mode, data present at the  
high-impedance port may bestoredin either register  
or in both. The select controls (Select AB select BA)  
can multiplex stored and real-time (transparent  
mode) data. The direction control determines which  
bus will receive data when enable G is active (low).  
In the isolation mode (enable G high), ”A” data may  
be stored in one register and/or ”B” data may be  
storedin the other register. When anoutput function  
is disabled, the input function is still enabled and  
may be used to store and transmit data. Only one  
of the two buses, A or B, may be driven at a time.  
All inputs are equipped with protection circuits  
against static discharge and transient excess volt-  
age.This integrated circuit has input and output  
characteristics that are fully compatible with 54/74  
LSTTL logic families. M74HCT devices are de-  
signed to directly interface HSC2MOS systems with  
TTL and NMOS components. They are also plug in  
replacements for LSTTL devices giving a reduction  
of power consumption.  
PIN CONNECTIONS (top view)  
INPUT AND OUTPUT EQUIVALENT CIRCUIT  
GAB, GAB, CAB,  
SAB, SBA, CBA  
A, B  
October 1993  
1/12  
1234567...12

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M74HCT646M1R 替代型号

型号 品牌 替代类型 描述 数据表
74HCT646D NXP

功能相似

 Octal bus transceiver/register; 3-state

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