Datasheet > M74HC4072B1R

M74HC4072B1R

更新时间： 2024-11-26 22:21:55

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		输入元件
页数	文件大小	规格书
9页	235K
描述
DUAL 4 INPUT OR GATE

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中文翻译

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数据手册

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M74HC4072B1R 数据手册

M54HC4072

M74HC4072

DUAL 4 INPUT OR GATE

HIGH SPEED

t_PD= 9 ns (TYP.) AT V_CC= 5 V

LOW POWER DISSIPATION

I_CC= 1 µA (MAX.) AT T_A= 25 °C

HIGH NOISE IMMUNITY

V_NIH= V_NIL= 28 % V_CC(MIN.)

OUTPUT DRIVE CAPABILITY

10 LSTTL LOADS

SYMMETRICAL OUTPUT IMPEDANCE

|I_OH| = I_OL= 4 mA (MIN.)

BALANCED PROPAGATION DELAYS

t_PLH= t_PHL

WIDE OPERATING VOLTAGE RANGE

B1R

(Plastic Package)

F1R

(Ceramic Package)

M1R

(Micro Package)

C1R

(Chip Carrier)

V_CC(OPR) = 2 V TO 6 V

PIN AND FUNCTION COMPATIBLE

WITH 4072B

ORDER CODES :

M54HC4072F1R

M74HC4072B1R

M74HC4072M1R

M74HC4072C1R

DESCRIPTION

The M54/74HC4072 is a high speed CMOS DUAL

4-INPUT OR GATE fabricated in silicon gate

C²MOS technology. It has the same highspeed per-

formance of LSTTL combined with true CMOS low

power consumption.

PIN CONNECTIONS (top view)

The internal circuit is composed of 3 stages includ-

ing buffer output, which gives high noise immunity

and stable output. All inputs are equipped with pro-

tectioncircuits against static discharge and transient

excess voltage.

INPUT AND OUTPUT EQUIVALENT CIRCUIT

NC =

No Internal

Connection

October 1992

1/9

12 3 4 5 6 7...9

中文翻译

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