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M74HC4016TTR PDF预览

M74HC4016TTR

更新时间: 2024-11-25 22:57:55
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 复用器开关复用器或开关信号电路光电二极管输出元件
页数 文件大小 规格书
11页 179K
描述
QUAD BILATERAL SWITCH

M74HC4016TTR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP14,.25
针数:14Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.29
Is Samacsys:N模拟集成电路 - 其他类型:SPST
JESD-30 代码:R-PDSO-G14JESD-609代码:e0
长度:5 mm正常位置:NO
信道数量:1功能数量:4
端子数量:14标称断态隔离度:50 dB
通态电阻匹配规范:16 Ω最大通态电阻 (Ron):320 Ω
最高工作温度:125 °C最低工作温度:-55 °C
输出:SEPARATE OUTPUT封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/12 V
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Multiplexer or Switches最大供电电压 (Vsup):12 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):4.5 V
表面贴装:YES最长断开时间:30 ns
最长接通时间:20 ns技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

M74HC4016TTR 数据手册

 浏览型号M74HC4016TTR的Datasheet PDF文件第2页浏览型号M74HC4016TTR的Datasheet PDF文件第3页浏览型号M74HC4016TTR的Datasheet PDF文件第4页浏览型号M74HC4016TTR的Datasheet PDF文件第5页浏览型号M74HC4016TTR的Datasheet PDF文件第6页浏览型号M74HC4016TTR的Datasheet PDF文件第7页 
M74HC4016  
QUAD BILATERAL SWITCH  
HIGH SPEED:  
= 9ns (TYP.) at V = 6V  
t
PD  
CC  
LOW POWER DISSIPATION:  
= 1µA(MAX.) at T =25°C  
I
CC  
A
LOW "ON" RESISTANCE:  
= 60TYP. AT V = 9V, I = 100 µA  
R
ON  
CC  
I/O  
DIP  
SOP  
TSSOP  
WIDE OPERATING VOLTAGE RANGE  
(OPR) = 2V TO 12V  
V
CC  
SINE WAVE DISTORTION:  
0.042% at V = 9V , f = 1KHz  
ORDER CODES  
PACKAGE  
CC  
pp  
HIGH NOISE IMMUNITY:  
= V = 28 % V (MIN.)  
TUBE  
T & R  
V
NIH  
NIL  
CC  
DIP  
SOP  
M74HC4016B1R  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 4016  
M74HC4016M1R M74HC4016RM13TR  
M74HC4016TTR  
TSSOP  
DESCRIPTION  
The M74HC4016 is an high speed CMOS QUAD  
BILATERAL SWITCH fabricated with silicon gate  
C MOS technology.  
The C input is provided to control the switch; the  
switch is on when the C input is held high and off  
when C is held low.  
2
PIN CONNECTION AND IEC LOGIC SYMBOLS  
August 2001  
1/11  

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