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M74HC368 PDF预览

M74HC368

更新时间: 2024-11-03 22:57:55
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
11页 252K
描述
HEX BUS BUFFER 3-STATE HC367 NON INVERTING, HC368 INVERTING

M74HC368 数据手册

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M54/M74HC367  
M54/M74HC368  
HEX BUS BUFFER (3-STATE)  
HC367 NON INVERTING, HC368 INVERTING  
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HIGH SPEED  
tPD = 11 ns (TYP.) AT VCC = 5 V  
LOW POWER DISSIPATION  
ICC = 4 µA (MAX.) AT TA = 25 °C  
HIGH NOISE IMMUNITY  
VNIH = VNIL = 28 % VCC (MIN.)  
OUTPUT DRIVE CAPABILITY  
15 LSTTL LOADS  
SYMMETRICAL OUTPUT IMPEDANCE  
|IOH| = IOL = 6 mA (MIN.)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
WIDE OPERATING VOLTAGE RANGE  
B1R  
(Plastic Package)  
F1R  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
VCC (OPR) = 2 V TO 6 V  
PIN AND FUNCTION COMPATIBLE WITH  
54/74LS367/368  
ORDER CODES :  
M54HCXXXF1R  
M74HCXXXB1R  
M74HCXXXM1R  
M74HCXXXC1R  
PIN CONNECTIONS (top view)  
HC368  
DESCRIPTION  
The M54/74HC367 and the M54/74HC368 are high  
speed CMOS HEX BUS BUFFER (3-STATE) fabri-  
cated in silicon gate C2MOS technology. They have  
the same high speed performance of LSTTL com-  
bined with true CMOS low power consumption.  
These devices contain six buffers, four buffers are  
controlled by an enable input (G1) and the other two  
buffers are controlled by the other enable input  
(G2) ; the outputs of each buffer group are enabled  
when G1 and/or G2 inputs are held low, and  
when held high these outputs are disabled to be  
high-impedance.  
HC367  
Theseoutputs are capable of driving upto15LSTTL  
loads. The designer has a choice of non-inverting  
outputs (HC367) and inverting outputs (HC368).  
All inputs are equipped with protection circuits  
against static discharge and transient excess volt-  
age.  
October 1992  
1/11  

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