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M74HC238 PDF预览

M74HC238

更新时间: 2024-11-01 22:57:55
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 解码器
页数 文件大小 规格书
10页 249K
描述
3 TO 8 LINE DECODER

M74HC238 数据手册

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M54HC238  
M74HC238  
3 TO 8 LINE DECODER  
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HIGH SPEED  
tPD = 14 ns (TYP.) AT VCC = 5 V  
LOW POWER DISSIPATION  
ICC = 4 µA (MAX.) AT TA = 25 °C  
HIGH NOISE IMMUNITY  
VNIH = VNIL = 28 % VCC (MIN.)  
OUTPUT DRIVE CAPABILITY  
10 LSTTL LOADS  
SYMMETRICAL OUTPUT IMPEDANCE  
|IOH| = IOL = 4 mA (MIN.)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
WIDE OPERATING VOLTAGE RANGE  
B1R  
(Plastic Package)  
F1R  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
VCC (OPR) = 2 V TO 6 V  
PIN AND FUNCTION COMPATIBLE  
WITH 54/74LS238  
ORDER CODES :  
M54HC238F1R  
M74HC238B1R  
M74HC238M1R  
M74HC238C1R  
PIN CONNECTIONS (top view)  
DESCRIPTION  
The M54/74HC238 is a high speed CMOS 3 to 8 line  
decoder fabricated insilicongate C2MOStechnology.  
It has the same high speed performance of LSTTL  
combined with true CMOSlow power consumption. If  
the device is enabled, 3 binary select inputs (A, B and  
C)determine whichoneof outputs willgohigh. Enable  
input G1 is held ”Low” or either G2A or G2B is held  
”High” decoding function is inhibited and all the 8 out-  
putsgo low. Three enable inputs are provided to ease  
cascade connection and application of this address  
decoder in memory systems.  
Allinputs are equipped with protection circuits against  
static discharge and transient excess voltage.  
NC =  
No Internal  
Connection  
October 1993  
1/10  

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