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M74HC125TTR PDF预览

M74HC125TTR

更新时间: 2024-11-26 05:10:59
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
10页 179K
描述
QUAD BUS BUFFER (3-STATE)

M74HC125TTR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP14,.25针数:14
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.24控制类型:ENABLE LOW
系列:HC/UHJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.006 A位数:1
功能数量:4端口数量:2
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:2/6 VProp。Delay @ Nom-Sup:22 ns
传播延迟(tpd):160 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):4.5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

M74HC125TTR 数据手册

 浏览型号M74HC125TTR的Datasheet PDF文件第2页浏览型号M74HC125TTR的Datasheet PDF文件第3页浏览型号M74HC125TTR的Datasheet PDF文件第4页浏览型号M74HC125TTR的Datasheet PDF文件第5页浏览型号M74HC125TTR的Datasheet PDF文件第6页浏览型号M74HC125TTR的Datasheet PDF文件第7页 
M74HC125  
QUAD BUS BUFFER (3-STATE)  
HIGH SPEED:  
= 8ns (TYP.) at V = 6V  
t
PD  
CC  
LOW POWER DISSIPATION:  
= 4µA(MAX.) at T =25°C  
I
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28 % V (MIN.)  
V
NIH  
NIL  
CC  
DIP  
SOP  
TSSOP  
T & R  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 6mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
t
t
ORDER CODES  
PACKAGE  
PLH  
PHL  
WIDE OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 6V  
TUBE  
V
CC  
DIP  
SOP  
M74HC125B1R  
M74HC125M1R  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 125  
M74HC125RM13TR  
M74HC125TTR  
TSSOP  
DESCRIPTION  
The M74HC125 is an high speed CMOS QUAD  
BUFFER (3-STATE) fabricated with silicon gate  
C MOS technology.  
All inputs are equipped with protection circuits  
against static discharge and transient excess  
voltage.  
2
The device requires the 3-STATE control input G  
to be set high to place the output into the high  
impedance state.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
August 2001  
1/10  

M74HC125TTR 替代型号

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