M74HC109M1

更新时间： 2024-09-29 13:02:15

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		触发器
页数	文件大小	规格书
12页	188K
描述
暂无描述

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

M74HC109M1 数据手册

M74HC109

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

■

HIGH SPEED :

= 67MHz (TYP.) at V = 6V

MAX

LOW POWER DISSIPATION:

=2µA(MAX.) at T =25°C

HIGH NOISE IMMUNITY:

= V = 28 % V (MIN.)

NIH

NIL

DIP

SOP

TSSOP

T & R

SYMMETRICAL OUTPUT IMPEDANCE:

|I | = I = 4mA (MIN)

BALANCED PROPAGATION DELAYS:

ORDER CODES

PACKAGE

PLH

PHL

WIDE OPERATING VOLTAGE RANGE:

(OPR) = 2V to 6V

TUBE

DIP

SOP

M74HC109B1R

M74HC109M1R

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 109

M74HC109RM13TR

M74HC109TTR

TSSOP

DESCRIPTION

are independent of the clock and are

accomplished by a logic low on the corresponding

input.

The M74HC109 is an high speed CMOS DUAL

J-K FLIP FLOP WITH PRESET AND CLEAR

fabricated with silicon gate C MOS technology. In

accordance with the logic level on the J and K

input this device changes state on positive going

transition of the clock pulse. CLEAR and PRESET

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

July 2001

1/12

12 3 4 5 6 7...12

中文翻译

下载PDF

与M74HC109M1相关器件

型号	品牌	获取价格	描述	数据表
M74HC109M1R	STMICROELECTRONICS	获取价格	DUAL J-K FLIP FLOP WITH PRESET AND CLEAR
M74HC109P	MITSUBISHI	获取价格	J-K Flip-Flop, 2-Func, Positive Edge Triggered, CMOS, PDIP16
M74HC109RM13TR	STMICROELECTRONICS	获取价格	DUAL J-K FLIP FLOP WITH PRESET AND CLEAR
M74HC109TTR	STMICROELECTRONICS	获取价格	DUAL J-K FLIP FLOP WITH PRESET AND CLEAR
M74HC10B1	STMICROELECTRONICS	获取价格	TRIPLE 3-INPUT NAND GATE
M74HC10B1R	STMICROELECTRONICS	获取价格	TRIPLE 3-INPUT NAND GATE
M74HC10C1R	STMICROELECTRONICS	获取价格	TRIPLE 3-INPUT NAND GATE
M74HC10M1R	STMICROELECTRONICS	获取价格	TRIPLE 3-INPUT NAND GATE
M74HC10RM13TR	STMICROELECTRONICS	获取价格	TRIPLE 3-INPUT NAND GATE
M74HC10TTR	STMICROELECTRONICS	获取价格	TRIPLE 3-INPUT NAND GATE