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M65881AFP PDF预览

M65881AFP

更新时间: 2024-11-23 05:47:19
品牌 Logo 应用领域
瑞萨 - RENESAS 消费电路商用集成电路光电二极管
页数 文件大小 规格书
23页 239K
描述
Digital Amplifier Processor of S-Master Technology

M65881AFP 技术参数

生命周期:Obsolete零件包装代码:SSOP
包装说明:0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-42针数:42
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.84Is Samacsys:N
其他特性:IT ALSO REQUIRES 3V TO 3.6V SUPPLY商用集成电路类型:CONSUMER CIRCUIT
JESD-30 代码:R-PDSO-G42长度:17.5 mm
功能数量:1端子数量:42
最高工作温度:75 °C最低工作温度:-20 °C
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
认证状态:Not Qualified座面最大高度:2.4 mm
最大供电电压 (Vsup):2 V最小供电电压 (Vsup):1.6 V
表面贴装:YES温度等级:COMMERCIAL EXTENDED
端子形式:GULL WING端子节距:0.8 mm
端子位置:DUAL宽度:8.4 mm
Base Number Matches:1

M65881AFP 数据手册

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M65881AFP  
REJ03F0004-0100Z  
Rev.1.00  
Digital Amplifier Processor of S-Master* Technology  
2003.05.08  
DESCRIPTION  
The M65881AFP is a S-Master technique processor for digital amplifier enable to convert from multi liner-PCM digital input signal  
to high precise switching-pulse digital output without analog processing.  
The M65881AFP has built-in 24bit sampling rate converter and digital-gain-controller.  
The M65881AFP enables to realize high precise ( X`tal oscillation accuracy.) full digital amplifier systems combining with power  
driver IC.  
FEATURES  
•Built-in 24bit Sampling Rate Converter.  
Input Signal Sampling Rate from 32KHz to 192KHz (24bit Maximum).  
4 kinds of Digital Input Format.  
•Built-in L/R Independent Digital Gain Control.  
•Built-in Soft Mute Function with Exponential Approximate-Curve.  
•Correspondence to Output for Headphone.  
OUTLINE : 42P2R  
0.8mm pitch 42pin SSOP  
MAIN SPECIFICATION  
•Master Clock  
Primary Clock: 256Fsi/512Fsi Secondary Clock: 1024Fso/512Fso  
•Input Signal Format:  
MSB First Right Justified(16/20/24bit),MSB First Left Justified(24bit)  
LSB First Right Justified(24bit),I2S(24bit)  
•Input Signal Sampling Rate from 32kHz to 192kHz.  
•Gain Control Function:  
+30dB~-¥ dB (0.1dB Step until -96dB, -138dB Minimum)  
•Third Order DS (16Fso:6bit/5bit,32Fso:5bit)  
APPLICATION  
DVD Receiver, AV Amplifier  
RECOMMENDED OPERATING CONDITIONS  
Logic Block:1.8V±10%,PWM Buffer Block :3.3V±10%  
SYSTEM BLOCK DIAGRAM)  
M65881AFP  
Stream  
LC  
Power  
Filter  
Driver  
24bit  
Level  
Control  
LRCK  
Sampling  
Rate  
Converter  
DS  
PWM  
BCK  
DATA  
+30dB  
to  
-¥  
32kHz  
to  
192kHz  
Stream  
Power  
Driver  
LC  
Filter  
Output  
for Headphone  
Clock  
Clock  
256fsi/512fsi  
MCU I/F  
1024fso/512fso  
* "S-Master" is the digital amplifier technology developed by Sony Corporation. "S-Master" is a trademark of Sony Corporation.  
page 1 of 23  
Rev.1.00 2003.05.08  

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