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M62301FP PDF预览

M62301FP

更新时间: 2024-11-11 05:47:15
品牌 Logo 应用领域
瑞萨 - RENESAS 转换器模拟IC信号电路光电二极管
页数 文件大小 规格书
12页 157K
描述
10 to 12-bit 4-ch Integrating A/D Converter

M62301FP 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:5.30 X 12.60 MM, 1.27 MM PITCH, PLASTIC, SOP-20针数:20
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.06Is Samacsys:N
其他特性:ALSO REQUIRES AN SUPPLY OF 4.5V TO 12V模拟集成电路 - 其他类型:ANALOG CIRCUIT
JESD-30 代码:R-PDSO-G20长度:12.6 mm
功能数量:1端子数量:20
最高工作温度:75 °C最低工作温度:-20 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
认证状态:Not Qualified座面最大高度:2.1 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
温度等级:COMMERCIAL EXTENDED端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:5.3 mmBase Number Matches:1

M62301FP 数据手册

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M62301SP/FP  
10 to 12-bit 4-ch Integrating A/D Converter  
REJ03D0861-0300  
Rev.3.00  
Mar 25, 2008  
Description  
M62301 semiconductor integrated circuit forms an integrating A/D converter, being connected to a microcomputer unit.  
By using selection signals and counter clock signals from the unit, a 10 to 12-bit A/D converter can be created at a low  
cost.  
The integration time and resolution can be set at the users option by changing external parameters. In addition, the  
built-in circuit offset, delay time and temperature fluctuation are adjustable, enabling a wide range of applications.  
M62301 has a 3 input decoder circuit, high-precision reference voltage (1.22 V) generator, current supply and  
comparator for integration, and voltage-monitoring reset circuit for a 5 V power supply. It is also equipped with  
girdling to prevent current leak from integration capacitor.  
Features  
Separate power supplies for analog section and digital section.  
Low power dissipation: 2 mA (Typ)  
(1 mA for A/D conversion and the other 1 mA for reset)  
Linear error: ±0.02% (Typ)  
Conversion time: 526 µs/ch (Typ)  
Built-in system reset: 4.45 V (Typ)  
Application  
High-precision control systems such as temperature control and speed control  
Block Diagram  
Analog  
VCC  
Digital  
VDD  
Constant  
current control  
Analog Digital  
GND  
GND  
12  
11  
10  
20  
14  
A1  
19  
18  
17  
16  
15  
A1  
A2  
A3  
A4  
A2  
A3  
+
5
INT  
0.49 V  
+
A4  
0.36 V  
VCC for  
RESET  
VREF  
GND  
Reference  
input  
1
6
150 µs  
Discharge  
Decoder  
RESET  
+
Delay  
circuit  
Reference  
voltage  
13  
VREF  
1.22 V  
7
8
9
2
3
4
Guard Integrating Guard C0 C1 C2  
ring 1 capacitor ring 2  
REJ03D0861-0300 Rev.3.00 Mar 25, 2008  
Page 1 of 11  

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