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M59DR032F100N1T PDF预览

M59DR032F100N1T

更新时间: 2024-11-13 20:46:07
品牌 Logo 应用领域
恒忆 - NUMONYX 光电二极管内存集成电路
页数 文件大小 规格书
38页 270K
描述
Flash, 2MX16, 100ns, PDSO48, 12 X 20 MM, PLASTIC, TSOP-48

M59DR032F100N1T 技术参数

生命周期:Obsolete零件包装代码:TSOP
包装说明:12 X 20 MM, PLASTIC, TSOP-48针数:48
Reach Compliance Code:unknownECCN代码:3A991.B.1.A
HTS代码:8542.32.00.51风险等级:5.28
最长访问时间:100 ns启动块:BOTTOM
JESD-30 代码:R-PDSO-G48长度:18.4 mm
内存密度:33554432 bit内存集成电路类型:FLASH
内存宽度:16功能数量:1
端子数量:48字数:2097152 words
字数代码:2000000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:2MX16封装主体材料:PLASTIC/EPOXY
封装代码:TSOP1封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
编程电压:1.8 V认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):2.2 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
类型:NOR TYPE宽度:12 mm
Base Number Matches:1

M59DR032F100N1T 数据手册

 浏览型号M59DR032F100N1T的Datasheet PDF文件第2页浏览型号M59DR032F100N1T的Datasheet PDF文件第3页浏览型号M59DR032F100N1T的Datasheet PDF文件第4页浏览型号M59DR032F100N1T的Datasheet PDF文件第5页浏览型号M59DR032F100N1T的Datasheet PDF文件第6页浏览型号M59DR032F100N1T的Datasheet PDF文件第7页 
M59DR032A  
M59DR032B  
32 Mbit (2Mb x16, Dual Bank, Page) Low Voltage Flash Memory  
PRELIMINARY DATA  
SUPPLY VOLTAGE  
– V  
= V  
= 1.65V to 2.2V: for Program,  
DDQ  
DD  
Erase and Read  
– V  
= 12V: optional Supply Voltage for fast  
PP  
Program and Erase  
ASYNCHRONOUS PAGE MODE READ  
– Page Width: 4 words  
BGA  
– Page Access: 35ns  
– Random Access: 100ns  
TSOP48 (N)  
12 x 20mm  
FBGA48 (ZB)  
8 x 6 solder balls  
PROGRAMMING TIME  
– 10µs by Word typical  
– Double Word Programming Option  
MEMORY BLOCKS  
– Dual Bank Memory Array: 4 Mbit - 28 Mbit  
– Parameter Blocks (Top or Bottom location)  
– Main Blocks  
Figure 1. Logic Diagram  
DUAL BANK OPERATIONS  
– Read within one Bank while Program or  
Erase within the other  
V
V
V
DD DDQ PP  
– No delay between Read and Write operations  
BLOCK PROTECTION/UNPROTECTION  
– All Blocks protected at Power Up  
21  
16  
A0-A20  
DQ0-DQ15  
– Any combination of Blocks can be protected  
– WP for Block Locking  
W
E
M59DR032A  
M59DR032B  
COMMON FLASH INTERFACE (CFI)  
64 bit SECURITY CODE  
G
RP  
WP  
ERASE SUSPEND and RESUME MODES  
100,000 PROGRAM/ERASE CYCLES per  
BLOCK  
20 YEARS DATA RETENTION  
– Defectivity below 1ppm/year  
ELECTRONIC SIGNATURE  
– Manufacturer Code: 20h  
V
SS  
AI02544B  
– Device Code, M59DR032A: A0h  
– Device Code, M59DR032B: A1h  
October 1999  
1/38  
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.  

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