Datasheet > M54HC126M1R

M54HC126M1R

更新时间： 2024-11-03 22:34:31

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		/
页数	文件大小	规格书
9页	122K
描述
QUAD BUS BUFFERS 3-STATE

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中文翻译

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数据手册

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M54HC126M1R 数据手册

M54HC125

RAD-HARD QUAD BUS BUFFER (3-STATE)

■

HIGH SPEED:

= 8ns (TYP.) at V = 6V

LOW POWER DISSIPATION:

= 4µA(MAX.) at T =25°C

HIGH NOISE IMMUNITY:

= V = 28% V (MIN.)

NIH

NIL

DILC-14

FPC-14

SYMMETRICAL OUTPUT IMPEDANCE:

|I | = I = 6mA (MIN)

BALANCED PROPAGATION DELAYS:

ORDER CODES

PACKAGE

PLH

PHL

WIDE OPERATING VOLTAGE RANGE:

(OPR) = 2V to 6V

DILC

FPC

M54HC125D

M54HC125K

M54HC125D1

M54HC125K1

PIN AND FUNCTION COMPATIBLE WITH

54 SERIES 125

■

SPACE GRADE-1: ESA SCC QUALIFIED

50 krad QUALIFIED, 100 krad AVAILABLE ON

REQUEST

NO SEL UNDER HIGH LET HEAVY IONS

IRRADIATION

The device requires the 3-STATE control input G

to be set high to place the output into the high

impedance state.

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

■

DEVICE FULLY COMPLIANT WITH

SCC-9401-039

DESCRIPTION

The M54HC125 is an high speed CMOS QUAD

BUFFER (3-STATE) fabricated with silicon gate

C MOS technology.

PIN CONNECTION

March 2004

1/9

12 3 4 5 6 7...9

中文翻译

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