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M54HC125DG PDF预览

M54HC125DG

更新时间: 2024-11-04 13:10:07
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
9页 122K
描述
Rad-Hard Quad Bus Buffer 3-State

M54HC125DG 技术参数

生命周期:ActiveReach Compliance Code:compliant
风险等级:5.69逻辑集成电路类型:BUS DRIVER
Base Number Matches:1

M54HC125DG 数据手册

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M54HC125  
RAD-HARD QUAD BUS BUFFER (3-STATE)  
HIGH SPEED:  
= 8ns (TYP.) at V = 6V  
t
PD  
CC  
LOW POWER DISSIPATION:  
= 4µA(MAX.) at T =25°C  
I
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28% V (MIN.)  
V
NIH  
NIL  
CC  
DILC-14  
FPC-14  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 6mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
t
t
ORDER CODES  
PACKAGE  
PLH  
PHL  
WIDE OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 6V  
FM  
EM  
V
CC  
DILC  
FPC  
M54HC125D  
M54HC125K  
M54HC125D1  
M54HC125K1  
PIN AND FUNCTION COMPATIBLE WITH  
54 SERIES 125  
SPACE GRADE-1: ESA SCC QUALIFIED  
50 krad QUALIFIED, 100 krad AVAILABLE ON  
REQUEST  
NO SEL UNDER HIGH LET HEAVY IONS  
IRRADIATION  
The device requires the 3-STATE control input G  
to be set high to place the output into the high  
impedance state.  
All inputs are equipped with protection circuits  
against static discharge and transient excess  
voltage.  
DEVICE FULLY COMPLIANT WITH  
SCC-9401-039  
DESCRIPTION  
The M54HC125 is an high speed CMOS QUAD  
BUFFER (3-STATE) fabricated with silicon gate  
2
C MOS technology.  
PIN CONNECTION  
March 2004  
1/9  

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