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M54HC125D PDF预览

M54HC125D

更新时间: 2024-11-03 22:46:39
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
9页 122K
描述
RAD-HARD QUAD BUS BUFFER (3-STATE)

M54HC125D 技术参数

是否Rohs认证: 不符合生命周期:Not Recommended
零件包装代码:DIP包装说明:DIP, DIP14,.3
针数:14Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.15控制类型:ENABLE LOW
系列:HC/UHJESD-30 代码:R-CDIP-T14
JESD-609代码:e0长度:19 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.006 A位数:1
功能数量:4端口数量:2
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:DIP封装等效代码:DIP14,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/6 V
Prop。Delay @ Nom-Sup:22 ns传播延迟(tpd):160 ns
认证状态:Not Qualified筛选级别:ESCC9000
座面最大高度:3.7 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):4.5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED总剂量:50k Rad(Si) V
宽度:7.62 mmBase Number Matches:1

M54HC125D 数据手册

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M54HC125  
RAD-HARD QUAD BUS BUFFER (3-STATE)  
HIGH SPEED:  
= 8ns (TYP.) at V = 6V  
t
PD  
CC  
LOW POWER DISSIPATION:  
= 4µA(MAX.) at T =25°C  
I
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28% V (MIN.)  
V
NIH  
NIL  
CC  
DILC-14  
FPC-14  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 6mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
t
t
ORDER CODES  
PACKAGE  
PLH  
PHL  
WIDE OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 6V  
FM  
EM  
V
CC  
DILC  
FPC  
M54HC125D  
M54HC125K  
M54HC125D1  
M54HC125K1  
PIN AND FUNCTION COMPATIBLE WITH  
54 SERIES 125  
SPACE GRADE-1: ESA SCC QUALIFIED  
50 krad QUALIFIED, 100 krad AVAILABLE ON  
REQUEST  
NO SEL UNDER HIGH LET HEAVY IONS  
IRRADIATION  
The device requires the 3-STATE control input G  
to be set high to place the output into the high  
impedance state.  
All inputs are equipped with protection circuits  
against static discharge and transient excess  
voltage.  
DEVICE FULLY COMPLIANT WITH  
SCC-9401-039  
DESCRIPTION  
The M54HC125 is an high speed CMOS QUAD  
BUFFER (3-STATE) fabricated with silicon gate  
2
C MOS technology.  
PIN CONNECTION  
March 2004  
1/9  

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