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M52S128324A-7BG PDF预览

M52S128324A-7BG

更新时间: 2024-11-29 05:46:55
品牌 Logo 应用领域
晶豪 - ESMT 存储内存集成电路动态存储器
页数 文件大小 规格书
47页 750K
描述
1M x 32 Bit x 4 Banks Synchronous DRAM

M52S128324A-7BG 技术参数

生命周期:Contact Manufacturer零件包装代码:BGA
包装说明:LFBGA,针数:90
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.02风险等级:5.6
Is Samacsys:N访问模式:FOUR BANK PAGE BURST
最长访问时间:6 ns其他特性:AUTO/SELF REFRESH
JESD-30 代码:R-PBGA-B90长度:13 mm
内存密度:134217728 bit内存集成电路类型:SYNCHRONOUS DRAM
内存宽度:32功能数量:1
端口数量:1端子数量:90
字数:4194304 words字数代码:4000000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:4MX32
封装主体材料:PLASTIC/EPOXY封装代码:LFBGA
封装形状:RECTANGULAR封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH
认证状态:Not Qualified座面最大高度:1.4 mm
自我刷新:YES最大供电电压 (Vsup):2.7 V
最小供电电压 (Vsup):2.3 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
宽度:8 mmBase Number Matches:1

M52S128324A-7BG 数据手册

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ESMT  
SDRAM  
M52S128324A  
1M x 32 Bit x 4 Banks  
Synchronous DRAM  
FEATURES  
ORDERING INFORMATION  
y
y
y
y
JEDEC standard 2.5V power supply  
LVTTL compatible with multiplexed address  
Four banks operation  
MRS cycle with address key programs  
- CAS Latency (1, 2 & 3 )  
- Burst Length ( 1, 2, 4, 8 & full page )  
- Burst Type ( Sequential & Interleave )  
All inputs are sampled at the positive going edge of the  
system clock  
MAX  
FREQ.  
Product No.  
PACKAGE COMMENTS  
M52S128324A-7TG 143MHz 86 TSOPII  
M52S128324A-7BG 143MHz 90 FBGA  
M52S128324A-10TG 100MHz 86 TSOPII  
M52S128324A-10BG 100MHz 90 FBGA  
Pb-free  
Pb-free  
Pb-free  
Pb-free  
y
y
Special function support  
- PASR (Partial Array Self Refresh)  
- TCSR (Temperature compensated Self Refresh)  
Issued by EMRS  
- DS (Driver Strength)  
y
y
y
DQM for masking  
Auto & self refresh  
64ms refresh period (4K cycle)  
GENERAL DESCRIPTION  
The M52S128324A is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 1,048,576 words by 32 bits.  
Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle.  
Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a  
variety of high bandwidth, high performance memory system applications.  
Elite Semiconductor Memory Technology Inc.  
Publication Date: Mar. 2009  
Revision: 1.4 1/47  

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