M52L32321A-6BG

更新时间： 2024-11-29 05:46:55

品牌	Logo	应用领域
晶豪 - ESMT		动态存储器
页数	文件大小	规格书
30页	866K
描述
512K x 32Bit x 2Banks Synchronous DRAM

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中文翻译

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数据手册

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M52L32321A-6BG 数据手册

ESMT

M52L32321A

SDRAM

512K x 32Bit x 2Banks

Synchronous DRAM

FEATURES

GENERAL DESCRIPTION

The M52L32321A is 33,554,432 bits synchronous high

data rate Dynamic RAM organized as 2 x 524,288 words by

32 bits, fabricated with high performance CMOS technology.

Synchronous design allows precise cycle control with the

use of system clock I/O transactions are possible on every

clock cycle. Range of operating frequencies, programmable

burst length and programmable latencies allow the same

device to be useful for a variety of high bandwidth, high

performance memory system applications.

3.3V power supply

LVCMOS compatible with multiplexed address

Dual banks operation

MRS cycle with address key programs

CAS Latency (1, 2 & 3 )

Burst Length (1, 2, 4, 8 & full page)

Burst Type (Sequential & Interleave)

EMRS cycle with address key programs.

All inputs are sampled at the positive going edge of the

system clock

Burst Read Single-bit Write operation

Special Function Support.

ORDERING INFORMATION

PASR (Partial Array Self Refresh )

TCSR (Temperature compensated Self Refresh)

DS (Driver Strength)

Max

Freq.

Product ID

Package

Comments

M52L32321A -10BG

100MHz 90 Ball BGA

Pb-free

DQM for masking

Auto & self refresh

64ms refresh period (4K cycle)

M52L32321A -7.5BG 133MHz 90 Ball BGA

M52L32321A -6BG 166MHz 90 Ball BGA

PIN CONFIGURATION (TOP VIEW)

90 Ball BGA

DQ26 DQ24 VSS

DQ28 VDDQ VSSQ

VSSQ DQ27 DQ25

VSSQ DQ29 DQ30

VDDQ DQ31 NC

VSS DQM3 A3

VDD DQ23 DQ21

VDDQ VSSQ DQ19

DQ22 DQ20 VDDQ

DQ17 DQ18 VDDQ

NC DQ16 VSSQ

A2 DQM2 VDD

A10

CLK CKE

DQM1 NC

RAS

DQM0

CAS

VDDQ DQ8 VSS

VSSQ DQ10 DQ9

VSSQ DQ12 DQ14

DQ11 VDDQ VSSQ

DQ13 DQ15 VSS

VDD DQ7 VSSQ

DQ6 DQ5 VDDQ

DQ1 DQ3 VDDQ

VDDQ VSSQ DQ4

VDD DQ0 DQ2

Elite Semiconductor Memory Technology Inc.

Publication Date : Apr. 2009

Revision : 1.0 1/30

12 3 4 5 6 7...30

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