ESMT
M52D32162A
Mobile SDRAM
1M x 16Bit x 2Banks
Mobile Synchronous DRAM
FEATURES
GENERAL DESCRIPTION
The M52D32162A is 33,554,432 bits synchronous high
data rate Dynamic RAM organized as 2 x 1,048,576 words
by 16 bits, fabricated with high performance CMOS
technology. Synchronous design allows precise cycle
control with the use of system clock I/O transactions are
possible on every clock cycle. Range of operating
frequencies, programmable burst length and programmable
latencies allow the same device to be useful for a variety of
high bandwidth, high performance memory system
applications.
z
z
z
z
1.8V power supply
LVCMOS compatible with multiplexed address
Dual banks operation
MRS cycle with address key programs
-
-
-
CAS Latency (2 & 3 )
Burst Length (1, 2, 4, 8 & full page)
Burst Type (Sequential & Interleave)
z
z
EMRS cycle with address key programs.
All inputs are sampled at the positive going edge of the
system clock
z
z
Burst Read Single-bit Write operation
Special Function Support.
ORDERING INFORMATION
-
-
-
PASR (Partial Array Self Refresh )
TCSR (Temperature compensated Self Refresh)
DS (Driver Strength)
Max
Freq.
Product ID
Package
Comments
z
z
z
DQM for masking
Auto & self refresh
64ms refresh period (4K cycle)
M52D32162A -7TG 143MHz 54 PIN TSOP(II)
M52D32162A -10TG 100MHz 54 PIN TSOP(II)
M52D32162A -7BG 143MHz 54 Ball BGA
M52D32162A -10BG 100MHz 54 Ball BGA
Pb-free
Pb-free
Pb-free
Pb-free
PIN CONFIGURATION (TOP VIEW)
TOP View
54 Ball BGA(8mmx8mm)
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
V
SS
1
V
DD
DQ15
2
DQ0
1
2
3
4
5
6
7
8
9
V
SSQ
3
V
DDQ
DQ1
DQ2
DQ14
DQ13
4
VSS
DQ15
VSSQ
VDDQ
A
B
C
D
E
F
DQ0
DQ2
DQ4
DQ6
VDD
DQ1
DQ3
DQ5
5
V
DDQ
6
V
SSQ
DQ3
DQ4
DQ12
DQ11
7
DQ14 DQ13
DQ12 DQ11
VDDQ
VSSQ
VDDQ
VSS
VSSQ
VDDQ
VSSQ
8
V
SSQ
9
V
DDQ
DQ5
DQ6
DQ10
DQ9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
DQ10
DQ9
NC
V
DDQ
V
SSQ
DQ8
DQ7
V
SS
V
DD
DQ8
UDQM
NC
LDQM
VDD
DQ7
WE
CS
NC
LDQM
WE
UDQM
CLK
CKE
NC
CLK
A11
CKE
A9
RAS
NC
CAS
BA
CAS
RAS
CS
G
H
J
A
A
A
A
A
A
A
V
11
NC
9
BA
A8
A7
A5
A6
A4
A0
A9
A1
A2
A10
VDD
8
A
10/AP
7
A
A
A
A
0
1
2
3
6
VSS
5
4
SS
V
DD
Elite Semiconductor Memory Technology Inc.
Publication Date : Jul. 2009
Revision : 1.6 1/32