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M50FLW040BK1T PDF预览

M50FLW040BK1T

更新时间: 2024-10-01 11:28:43
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 闪存
页数 文件大小 规格书
52页 856K
描述
4 Mbit (5 x 64KByte Blocks + 3 x 16 x 4KByte Sectors) 3V Supply Firmware Hub / Low Pin Count Flash Memory

M50FLW040BK1T 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFJ包装说明:PLASTIC, LCC-32
针数:32Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.91最长访问时间:11 ns
启动块:TOP命令用户界面:YES
数据轮询:NOJESD-30 代码:R-PQCC-J32
JESD-609代码:e0长度:13.97 mm
内存密度:4194304 bit内存集成电路类型:FLASH
内存宽度:8功能数量:1
部门数/规模:48,5端子数量:32
字数:524288 words字数代码:512000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:512KX8
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC32,.5X.6封装形状:RECTANGULAR
封装形式:CHIP CARRIER并行/串行:PARALLEL
电源:3.3 V编程电压:3 V
认证状态:Not Qualified就绪/忙碌:YES
座面最大高度:3.56 mm部门规模:4K,64K
最大待机电流:0.0001 A子类别:Flash Memories
最大压摆率:0.06 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD切换位:NO
类型:NOR TYPE宽度:11.43 mm
Base Number Matches:1

M50FLW040BK1T 数据手册

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M50FLW040A  
M50FLW040B  
4 Mbit (5 x 64KByte Blocks + 3 x 16 x 4KByte Sectors)  
3V Supply Firmware Hub / Low Pin Count Flash Memory  
PRELIMINARY DATA  
FEATURES SUMMARY  
FLASH MEMORY  
Figure 1. Packages  
Compatible with either the LPC interface  
or the FWH interface (Intel Spec rev1.1)  
used in PC BIOS applications  
5 Signal Communication Interface  
supporting Read and Write Operations  
5 Additional General Purpose Inputs for  
platform design flexibility  
Synchronized with 33MHz PCI clock  
PLCC32 (K)  
8 BLOCKS OF 64 KBYTES  
5 blocks of 64 KBytes each  
3 blocks, subdivided into 16 uniform  
sectors of 4 KBytes each  
Two blocks at the top and one at the  
bottom (M50FLW040A)  
One block at the top and two at the bottom  
(M50FLW040B)  
ENHANCED SECURITY  
Hardware Write Protect Pins for Block  
Protection  
Register-based Read and Write  
Protection  
TSOP32 (NB)  
8 x 14mm  
SUPPLY VOLTAGE  
V
= 3 to 3.6V for Program, Erase and  
CC  
Read Operations  
V
= 12V for Fast Program and Erase  
PP  
TWO INTERFACES  
Auto Detection of Firmware Hub (FWH) or  
Low Pin Count (LPC) Memory Cycles for  
Embedded Operation with PC Chipsets  
TSOP40 (N)  
10 x 20mm  
Address/Address Multiplexed (A/A Mux)  
Interface for programming equipment  
compatibility.  
PROGRAM/ERASE SUSPEND  
PROGRAMMING TIME: 10µs typical  
PROGRAM/ERASE CONTROLLER  
Read other Blocks/Sectors during  
Program Suspend  
Program other Blocks/Sectors during  
Erase Suspend  
Embedded Program and Erase algorithms  
Status Register Bits  
ELECTRONIC SIGNATURE  
Manufacturer Code: 20h  
Device Code (M50FLW040A): 08h  
Device Code (M50FLW040B): 28h  
August 2004  
1/52  
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.  

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