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M36W108B100ZN5 PDF预览

M36W108B100ZN5

更新时间: 2024-11-19 13:10:03
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 闪存内存集成电路静态存储器
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35页 248K
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M36W108B100ZN5 数据手册

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M36W108T  
M36W108B  
8 Mbit (1Mb x8, Boot Block) Flash Memory and  
1 Mbit (128Kb x8) SRAM Low Voltage Multi-Memory Product  
NOT FOR NEW DESIGN  
M36W108T and M36W108B are replaced  
respectively by the M36W108AT and  
M36W108AB  
SUPPLY VOLTAGE  
– V  
= V  
= 2.7V to 3.6V: for Program,  
CCS  
CCF  
Erase and Read  
BGA  
LGA  
ACCESS TIME: 100ns  
LOW POWER CONSUMPTION  
– Read: 40mA max. (SRAM chip)  
– Stand-by: 30µA max. (SRAM chip)  
– Read: 10mA max. (Flash chip)  
– Stand-by: 100µA max. (Flash chip)  
LBGA48 (ZM)  
6 x 8 solder balls  
LGA48 (ZN)  
6 x 8 solder lands  
FLASH MEMORY  
8 Mbit (1Mb x 8) BOOT BLOCK ERASE  
Figure 1. Logic Diagram  
PROGRAMMING TIME: 10µs typical  
PROGRAM/ERASE CONTROLLER (P/E.C.)  
– Program Byte-by-Byte  
V
V
CCF CCS  
– Status Register bits and Ready/Busy Output  
MEMORY BLOCKS  
– Boot Block (Top or Bottom location)  
– Parameter and Main Blocks  
20  
8
A0-A19  
DQ0-DQ7  
RB  
BLOCK, MULTI-BLOCK and CHIP ERASE  
ERASE SUSPEND and RESUME MODES  
W
EF  
– Read and Program another Block during  
Erase Suspend  
M36W108T  
M36W108B  
G
100,000 PROGRAM/ERASE CYCLES per  
RP  
E1S  
E2S  
BLOCK  
ELECTRONIC SIGNATURE  
– Manufacturer Code: 20h  
– Device Code, M36W108T: D2h  
– Device Code, M36W108B: DCh  
V
SS  
SRAM  
AI02509  
1 Mbit (128Kb x 8)  
POWER DOWN FEATURES USING TWO  
CHIP ENABLE INPUTS  
LOW V  
DATA RETENTION: 2V  
CC  
May 1999  
1/35  
This is information on a product still in production but not recommended for new designs.  

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