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M35053-052FP PDF预览

M35053-052FP

更新时间： 2024-09-22 22:06:35
品牌 Logo 应用领域
三菱 - MITSUBISHI 显示控制器
页数 文件大小 规格书
47页 296K
描述
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

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中文翻译

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M35053-052FP 数据手册

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MITSUBISHI MICROCOMPUTERS  
M35053-XXXSP/FP  
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS  
DESCRIPTION  
PIN CONFIGURATION (TOP VIEW)  
The M35053-XXXSP/FP is TV screen display control IC which can  
be used to display information such as number of channels, the date  
and messages and program schedules on the TV screen.  
In particular, owing to the built-in SYNC-SEP (synchronous separa-  
tion) circuit, the synchronous correction circuit, the Decoder circuit,  
and to the Encoder circuit, external circuits can be decrease and  
character turbulence that occurs when superimposing can be reduced.  
The processor can conform to the EDS broadcast service and is suit-  
able for AV systems such as VTRs, LDs, and so on.  
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
CP1  
TESTA  
CS  
VDD1  
←
HOR  
←
→
←
3
CP2  
→
→
↔
→
4
SCK  
SIN  
OSCIN  
5
V
SS  
It is a silicon gate CMOS process and M35053-XXXSP is housed in  
a 20-pin shrink DIP package, M35053-XXXFP is housed in a 20-pin  
shrink SOP package.  
6
AC  
P1  
→
→
7
V
DD2  
P0  
For M35053-001SP/FP that is a standard ROM version of M35053-  
XXXSP/FP respectively, the character pattern is also mentioned.  
8
CVIDEO  
LECHA  
CVIN  
TESTB  
EDO  
←
→
→
9
→
10  
V
SS  
FEATURES  
Screen composition .............................. 24 characters ✕ 10 lines,  
•
32 characters ✕ 7 lines  
Outline 20P4B  
Number of characters displayed .................................. 240 (Max.)  
•
Character composition ..................................... 12 ✕ 18 dot matrix  
•
Characters available ............................................. 256 characters  
•
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
CP1  
TESTA  
CS  
V
DD1  
Character sizes available .................... 4 (horizontal) ✕ 4 (vertical)  
←
•
Display locations available  
•
HOR  
←
→
←
Horizontal direction ............................................... 240 locations  
Vertical direction ................................................... 256 locations  
3
CP2  
→
→
↔
→
Blinking ................................................................. Character units  
4
SCK  
SIN  
OSCIN  
•
Cycle : approximately 1 second, or approximately 0.5 seconds  
Duty : 25%, 50%, or 75%  
5
V
SS  
6
AC  
P1  
Data input.............................. By the serial input function (16 bits)  
→
→
•
•
Coloring  
7
V
DD2  
P0  
Background coloring (composite video signal)  
8
CVIDEO  
LECHA  
CVIN  
TESTB  
EDO  
←
→
→
Blanking  
•
Total blanking (14 ✕ 18 dots)  
Border size blanking  
9
→
10  
V
SS  
Character size blanking  
Synchronizing signal  
•
Outline 20P2Q-A  
Composite synchronizing signal generation  
(PAL, NTSC, M-PAL)  
2 output ports (1 digital line)  
•
•
Oscillation stop function  
It is possible to stop the oscillation for synchronizing signal  
generation  
Built-in half-tone display function  
•
Built-in reversed character display function  
•
Built-in Decoder (NTSC only)  
•
Built-in Encoder (NTSC only)  
•
Built-in synchronous correction circuit  
•
Built-in synchronous separation circuit  
•
APPLICATION  
TV, VCR, Movie  
REV.1.1  
1234567...47

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