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M34C02-LBN6T PDF预览

M34C02-LBN6T

更新时间: 2024-11-15 22:46:43
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
19页 149K
描述
2 Kbit Serial IC Bus EEPROM For DIMM Serial Presence Detect

M34C02-LBN6T 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:PLASTIC, DIP-8
针数:8Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.87Is Samacsys:N
最大时钟频率 (fCLK):0.4 MHzJESD-30 代码:R-PDIP-T8
JESD-609代码:e0长度:9.27 mm
内存密度:2048 bit内存集成电路类型:EEPROM
内存宽度:8功能数量:1
端子数量:8字数:256 words
字数代码:256工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:256X8封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE并行/串行:SERIAL
峰值回流温度(摄氏度):225认证状态:Not Qualified
座面最大高度:5.33 mm串行总线类型:I2C
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2.2 V
标称供电电压 (Vsup):2.5 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:7.62 mm
最长写入周期时间 (tWC):10 msBase Number Matches:1

M34C02-LBN6T 数据手册

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M34C02  
2 Kbit Serial I²C Bus EEPROM  
For DIMM Serial Presence Detect  
2
Two Wire I C Serial Interface  
Supports 400 kHz Protocol  
Single Supply Voltage:  
– 2.5V to 5.5V for M34C02-W  
– 2.2V to 5.5V for M34C02-L  
8
Software Data Protection for lower 128 bytes  
BYTE and PAGE WRITE (up to 16 bytes)  
RANDOM and SEQUENTIAL READ Modes  
Self-Timed Programming Cycle  
Automatic Address Incrementing  
Enhanced ESD/Latch-Up Protection  
1 Million Erase/Write Cycles (minimum)  
40 Year Data Retention (minimum)  
1
PSDIP8 (BN)  
0.25 mm frame  
8
8
1
1
DESCRIPTION  
SO8 (MN)  
150 mil width  
TSSOP8 (DW)  
169 mil width  
The M34C02 is a 2 Kbit serial EEPROM memory  
able to lock permanently the data in its first half  
(from location 00h to 7Fh). This facility has been  
designed specifically for use in DRAM DIMMs  
(dual interline memory modules) with Serial  
Presence Detect. All the information concerning  
the DRAM module configuration (such as its  
access speed, its size, its organization) can be  
kept write protected in the first half of the memory.  
Figure 1. Logic Diagram  
This bottom half of the memory area can be write-  
protected using a specially designed software  
write protection mechanism. By sending the  
device a specific sequence, the first 128 bytes of  
V
CC  
3
Table 1. Signal Names  
E0-E2  
SDA  
E0, E1, E2  
SDA  
Chip Enable Inputs  
M34C02  
SCL  
WC  
Serial Data/Address Input/  
Output  
SCL  
WC  
Serial Clock  
Write Control  
Supply Voltage  
Ground  
V
SS  
V
AI01931  
CC  
V
SS  
December 1999  
1/19  

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