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M30L0R7000T0ZAQT PDF预览

M30L0R7000T0ZAQT

更新时间: 2024-10-27 22:07:47
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 闪存存储内存集成电路
页数 文件大小 规格书
83页 1327K
描述
128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory

M30L0R7000T0ZAQT 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:BGA包装说明:8 X 10 MM, 0.80 MM PITCH, TFBGA-88
针数:88Reach Compliance Code:not_compliant
ECCN代码:3A991.B.1.AHTS代码:8542.32.00.51
风险等级:5.35最长访问时间:85 ns
其他特性:SYNCHRONOUS BURST MODE OPERATION POSSIBLE启动块:TOP
命令用户界面:YES通用闪存接口:YES
数据轮询:NOJESD-30 代码:R-PBGA-B88
JESD-609代码:e0长度:10 mm
内存密度:134217728 bit内存集成电路类型:FLASH
内存宽度:16功能数量:1
部门数/规模:4,127端子数量:88
字数:8388608 words字数代码:8000000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-25 °C组织:8MX16
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA88,8X12,32封装形状:RECTANGULAR
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH页面大小:4 words
并行/串行:PARALLEL电源:1.8 V
编程电压:1.8 V认证状态:Not Qualified
座面最大高度:1.2 mm部门规模:16K,64K
最大待机电流:0.000005 A子类别:Flash Memories
最大压摆率:0.047 mA最大供电电压 (Vsup):2 V
最小供电电压 (Vsup):1.7 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子面层:Tin/Lead (Sn/Pb)
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM切换位:NO
类型:NOR TYPE宽度:8 mm
Base Number Matches:1

M30L0R7000T0ZAQT 数据手册

 浏览型号M30L0R7000T0ZAQT的Datasheet PDF文件第2页浏览型号M30L0R7000T0ZAQT的Datasheet PDF文件第3页浏览型号M30L0R7000T0ZAQT的Datasheet PDF文件第4页浏览型号M30L0R7000T0ZAQT的Datasheet PDF文件第5页浏览型号M30L0R7000T0ZAQT的Datasheet PDF文件第6页浏览型号M30L0R7000T0ZAQT的Datasheet PDF文件第7页 
M30L0R7000T0  
M30L0R7000B0  
128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst)  
1.8V Supply Flash Memory  
FEATURES SUMMARY  
SUPPLY VOLTAGE  
Figure 1. Package  
VDD = 1.7V to 2.0V for program, erase and  
read  
VDDQ = 1.7V to 2.0V for I/O Buffers  
VPP = 9V for fast program (12V tolerant)  
SYNCHRONOUS / ASYNCHRONOUS READ  
FBGA  
Synchronous Burst Read mode: 54MHz  
Asynchronous Page Read mode  
Random Access: 85ns  
SYNCHRONOUS BURST READ SUSPEND  
PROGRAMMING TIME  
10µs typical Word program time using  
Buffer Program  
TFBGA88 (ZAQ)  
8 x 10mm  
MEMORY ORGANIZATION  
Multiple Bank Memory Array: 8 Mbit  
Banks  
Parameter Blocks (Top or Bottom  
location)  
DUAL OPERATIONS  
ELECTRONIC SIGNATURE  
program/erase in one Bank while read in  
others  
Manufacturer Code: 20h  
Top Device Code: 88C4h.  
Bottom Device Code: 88C5h  
No delay between read and write  
operations  
PACKAGE  
BLOCK LOCKING  
All blocks locked at power-up  
Any combination of blocks can be locked  
with zero latency  
WP for Block Lock-Down  
Absolute Write Protection with VPP = VSS  
– Compliant with Lead-Free Soldering  
Processes  
– Lead-Free Versions  
SECURITY  
64 bit unique device number  
2112 bit user programmable OTP Cells  
COMMON FLASH INTERFACE (CFI)  
100,000 PROGRAM/ERASE CYCLES per  
BLOCK  
December 2004  
1/83  

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