Datasheet > M2S100T-FC1152I

M2S100T-FC1152I

更新时间： 2024-11-30 06:00:39

品牌	Logo	应用领域
美高森美 - MICROSEMI		栅
页数	文件大小	规格书
25页	1636K
描述
Field Programmable Gate Array, 99512-Cell, CMOS, PBGA1152, 35 X 35 MM, 1 MM PITCH, FBGA-1152

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M2S100T-FC1152I 数据手册

Product

SmartFusion2 System-on-Chip FPGAs Product

Brief

Microsemi’s SmartFusion^®2 SoC FPGAs integrate fourth generation flash-based FPGA fabric, an ARM^®Cortex™-M3

processor, and high-performance communications interfaces on a single chip. The SmartFusion2 family is the

industry’s lowest power, most reliable and highest security programmable logic solution. SmartFusion2 FPGAs offer up

to 3.6X the gate density, up to 2X the performance of previous flash-based FPGA families, and includes multiple

memory blocks and multiply accumulate blocks for DSP processing. The 166 MHz ARM Cortex-M3 processor is

enhanced with an embedded trace macrocell (ETM), memory protection unit (MPU), 8 kbyte instruction cache, and

additional peripherals, including controller area network (CAN), Gigabit Ethernet, and high speed universal serial bus

(USB). High speed serial interfaces include PCI EXPRESS^®(PCIe^®), 10 Gbps attachment unit interface (XAUI) /

XGMII extended sublayer (XGXS) plus native serialization/deserialization (SERDES) communication, while double

data rate 2 (DDR2)/DDR3 memory controllers provide high speed memory interfaces.

SmartFusion2 Family

–

Intellectual Property (IP) Protection Through

Unique Security Features and Use Models

New to the PLD Industry

Reliability

•

Single Event Upset (SEU) Immune

Zero FIT FPGA Configuration Cells

Junction Temperature: 125°C

–

Encrypted User Key and Bitstream Loading,

Enabling Programming in Less-Trusted

Locations

•

–

Military

Temperature, 100°C – Industrial Temperature,

85°C – Commercial Temperature

–

Supply-Chain Assurance Device Certificate

Enhanced Anti-Tamper Features

Zeroization

•

Single Error Correct Double Error Detect

(SECDED) Protection on the Following:

–

Ethernet Buffers

Low Power

CAN Message Buffers

•

Low Static and Dynamic Power

Cortex-M3 Embedded Scratch Pad Memory

(eSRAMs)

–

Flash*Freeze Mode for Fabric

–

USB Buffers

PCIe Buffer

•

Power as low as 13 mW/Gbps per lane for

SERDES devices

Up to 50% lower total power than competing SoC

devices

DDR Memory Controllers with Optional

SECDED Modes

High-Performance FPGA

•

Buffers Implemented with SEU Resistant Latches

on the Following:

•

Efficient 4-Input LUTs with Carry Chains for High-

Performance and Low Power

–

DDR Bridges (MSS, MDDR, FDDR)

Instruction Cache

•

Up to 236 Blocks of Dual-Port 18 Kbit SRAM

(Large SRAM) with 400 MHz Synchronous

Performance (512 x 36, 512 x 32, 1 kbit x 18, 1

kbit x 16, 2 kbit x 9, 2 kbit x 8, 4 kbit x 4, 8 kbit x

2, or 16 kbit x 1)

MMUART FIFOs

SPI FIFOs

•

NVM Integrity Check at Power-Up and On-

Demand

•

Up to 240 Blocks of Three-Port 1 Kbit SRAM with

2 Read Ports and 1 Write Port (micro SRAM)

No External Configuration Memory Required—

Instant-On, Retains Configuration When Powered

Off

High-Performance DSP Signal Processing

–

Up to 240 Fast Mathblocks with 18 x 18

Signed Multiplication, 17 x 17 Unsigned

Multiplication and 44-Bit Accumulator

Security

•

Design Security Features (Available on all

Devices)

August 2014

12 3 4 5 6 7...25

中文翻译

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与M2S100T-FC1152I相关器件

型号	品牌	获取价格	描述	数据表
M2S11FBJ01.0000MHZ	MTRONPTI	获取价格	Oscillator, 1MHz Min, 60MHz Max, 1MHz Nom,
M2S11FBJ60.0000MHZ	MTRONPTI	获取价格	Oscillator, 1MHz Min, 60MHz Max, 60MHz Nom,
M2S120-1FG144Y	MICROSEMI	获取价格	SmartFusion2 System-on-Chip FPGAs
M2S120-1FG144YES	MICROSEMI	获取价格	SmartFusion2 System-on-Chip FPGAs
M2S120-1FG144YI	MICROSEMI	获取价格	SmartFusion2 System-on-Chip FPGAs
M2S120-1FGG144Y	MICROSEMI	获取价格	SmartFusion2 System-on-Chip FPGAs
M2S120-1FGG144YES	MICROSEMI	获取价格	SmartFusion2 System-on-Chip FPGAs
M2S120-1FGG144YI	MICROSEMI	获取价格	SmartFusion2 System-on-Chip FPGAs
M2S120-1VF144Y	MICROSEMI	获取价格	SmartFusion2 System-on-Chip FPGAs
M2S120-1VF144YES	MICROSEMI	获取价格	SmartFusion2 System-on-Chip FPGAs

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