Datasheet > M2S025T-1FG484YI

M2S025T-1FG484YI

更新时间： 2024-11-23 19:55:43

品牌	Logo	应用领域
美高森美 - MICROSEMI		栅可编程逻辑
页数	文件大小	规格书
156页	7394K
描述
Field Programmable Gate Array, 23988-Cell, CMOS, PBGA484,

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

M2S025T-1FG484YI 技术参数

是否Rohs认证：	不符合	生命周期：	Active
包装说明：	BGA, BGA484,22X22,40	Reach Compliance Code：	unknown
风险等级：	5.91	JESD-30 代码：	S-PBGA-B484
输入次数：	267	逻辑单元数量：	23988
输出次数：	267	端子数量：	484
封装主体材料：	PLASTIC	封装代码：	BGA
封装等效代码：	BGA484,22X22,40	封装形状：	SQUARE
封装形式：	GRID ARRAY	电源：	1.2 V
可编程逻辑类型：	FIELD PROGRAMMABLE GATE ARRAY	认证状态：	Not Qualified
子类别：	Field Programmable Gate Arrays	标称供电电压：	1.2 V
表面贴装：	YES	技术：	CMOS
端子形式：	BALL	端子节距：	1 mm
端子位置：	BOTTOM	Base Number Matches：	1

M2S025T-1FG484YI 数据手册

Revision 0

SmartFusion2 System-on-Chip FPGAs

Microsemi’s SmartFusion^®2 SoC FPGAs integrate fourth generation flash-based FPGA fabric, an ARM^®Cortex™-M3 processor,

and high performance communications interfaces on a single chip. The SmartFusion2 family is the industry’s lowest power, most

reliable and highest security programmable logic solution. This next generation SmartFusion2 architecture offers up to 3.6X gate

count implemented with 4-input look-up table (LUT) fabric with carry chains, giving 2X performance, and includes multiple embedded

memory options and math blocks for digital signal processing (DSP). The 166 MHz ARM Cortex-M3 processor is enhanced with an

embedded trace macrocell (ETM), memory protection unit (MPU), 8 Kbyte instruction cache, and additional peripherals including

controller area network (CAN), Gigabit Ethernet, and high speed universal serial bus (USB). High speed serial interfaces include

peripheral component interconnect express (PCIe), 10 Gbps attachment unit interface (XAUI) / XGMII extended sublayer (XGXS) +

native serialization/deserialization (SERDES) communication, while double data rate 2 (DDR2)/DDR3 memory controllers provide

high speed memory interfaces.

SmartFusion2 Family

–

Enhanced Anti-Tamper Features

Zeroization

Reliability

•

Single Event Upset (SEU) Immune

•

Data Security Features (available on premium devices)

–

Zero FIT FPGA Configuration Cells

–

Non-Deterministic Random Bit Generator (NRBG)

•

Single Error Correct Double Error Detect (SECDED)

Protection on the Following:

User Cryptographic Services (AES-256, SHA-256,

Elliptical Curve Cryptographic (ECC) Engine)

–

Ethernet Buffers

–

User Physically Unclonable Function (PUF) Key

Enrollment and Regeneration

CAN Message Buffers

Cortex-M3 Embedded Scratch Pad Memory

(eSRAMs)

–

CRI Pass-Through DPA Patent Portfolio License

Hardware Firewalls Protecting Microcontroller

Subsystem (MSS) Memories

–

USB Buffers

PCIe Buffer

Low Power

DDR Memory Controllers with Optional SECDED

Modes

•

Low Static and Dynamic Power

Flash*Freeze Mode for Fabric

For the M2S050 Device:

•

Buffers Implemented with SEU Resistant Latches on the

Following:

–

•

–

DDR Bridges (MSS, MDDR, FDDR)

Instruction Cache

–

< 1 mW in Flash*Freeze Mode

10 mW in Standby Mode

MMUART FIFOs

•

Based on 65 nm Nonvolatile Flash Process

SPI FIFOs

High-Performance FPGA

•

NVM Integrity Check at Power-Up and On-Demand

•

Efficient 4-Input LUTs with Carry Chains for High

Performance and Low Power

No External Configuration Memory Required—Instant-

On, Retains Configuration When Powered Off

•

Up to 236 Blocks of Dual-Port 18 Kbit SRAM (Large

SRAM) with 400 MHz Synchronous Performance (x18,

x9, x4, x2, x1)

Security

•

Design Security Features (available on all devices)

•

Up to 240 Blocks of Three-Port 1 Kbit SRAM with 2

Read Ports and 1 Write Port (micro SRAM)

–

Intellectual Property (IP) Protection via Unique

Security Features and Use Models New to the PLD

Industry

High Performance DSP Signal Processing

–

Encrypted User Key and Bitstream Loading,

Enabling Programming in Less-Trusted Locations

–

Up to 240 Fast Math Blocks with 18 x 18 Signed

Multiplication, 17 x 17 Unsigned Multiplication and

44-Bit Accumulator

Supply-Chain Assurance Device Certificate

October 2012

12 3 4 5 6 7...156

中文翻译

下载PDF

与M2S025T-1FG484YI相关器件

型号	品牌	获取价格	描述	数据表
M2S025T-1FGG144Y	MICROSEMI	获取价格	SmartFusion2 System-on-Chip FPGAs
M2S025T-1FGG144YES	MICROSEMI	获取价格	SmartFusion2 System-on-Chip FPGAs
M2S025T-1FGG144YI	MICROSEMI	获取价格	SmartFusion2 System-on-Chip FPGAs
M2S025T-1FGG484MX399	MICROSEMI	获取价格	Field Programmable Gate Array, PBGA484, 23 X 23 MM, 1 MM PITCH, FBGA-484
M2S025T-1VF144Y	MICROSEMI	获取价格	SmartFusion2 System-on-Chip FPGAs
M2S025T-1VF144YES	MICROSEMI	获取价格	SmartFusion2 System-on-Chip FPGAs
M2S025T-1VF144YI	MICROSEMI	获取价格	SmartFusion2 System-on-Chip FPGAs
M2S025T-1VF400Y	MICROSEMI	获取价格	Field Programmable Gate Array, 23988-Cell, CMOS, PBGA400,
M2S025T-1VF400YI	MICROSEMI	获取价格	Field Programmable Gate Array, 23988-Cell, CMOS, PBGA400,
M2S025T-1VFG144Y	MICROSEMI	获取价格	SmartFusion2 System-on-Chip FPGAs

与M2S025T-1FG484YI相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

35
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

26
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

54
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

52

产品中心

服务支持

精选活动

关于我们

帮助中心

M2S025T-1FG484YI

M2S025T-1FG484YI 技术参数

M2S025T-1FG484YI 数据手册

与M2S025T-1FG484YI相关器件

与M2S025T-1FG484YI相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

M2S025T-1FG484YI

M2S025T-1FG484YI 技术参数

M2S025T-1FG484YI 数据手册

与M2S025T-1FG484YI相关器件

与M2S025T-1FG484YI相关文章

您还可以找

您在本页遇到什么问题？