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M29F400B-120N3R PDF预览

M29F400B-120N3R

更新时间: 2024-11-28 22:55:59
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 闪存存储内存集成电路光电二极管
页数 文件大小 规格书
34页 232K
描述
4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory

M29F400B-120N3R 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSOP包装说明:12 X 20 MM, PLASTIC, REVERSE, TSOP-48
针数:48Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.69Is Samacsys:N
最长访问时间:120 ns其他特性:BOTTOM BOOT BLOCK
备用内存宽度:8启动块:BOTTOM
命令用户界面:YES数据轮询:YES
耐久性:100000 Write/Erase CyclesJESD-30 代码:R-PDSO-G48
JESD-609代码:e0长度:18.4 mm
内存密度:4194304 bit内存集成电路类型:FLASH
内存宽度:16功能数量:1
部门数/规模:1,2,1,7端子数量:48
字数:262144 words字数代码:256000
工作模式:ASYNCHRONOUS最高工作温度:125 °C
最低工作温度:-40 °C组织:256KX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP48,.8,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V编程电压:5 V
认证状态:Not Qualified就绪/忙碌:YES
反向引出线:YES座面最大高度:1.2 mm
部门规模:16K,8K,32K,64K最大待机电流:0.0001 A
子类别:Flash Memories最大压摆率:0.02 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED切换位:YES
类型:NOR TYPE宽度:12 mm
Base Number Matches:1

M29F400B-120N3R 数据手册

 浏览型号M29F400B-120N3R的Datasheet PDF文件第2页浏览型号M29F400B-120N3R的Datasheet PDF文件第3页浏览型号M29F400B-120N3R的Datasheet PDF文件第4页浏览型号M29F400B-120N3R的Datasheet PDF文件第5页浏览型号M29F400B-120N3R的Datasheet PDF文件第6页浏览型号M29F400B-120N3R的Datasheet PDF文件第7页 
M29F400T  
M29F400B  
4 Mbit (512Kb x8 or 256Kb x16, Boot Block)  
Single Supply Flash Memory  
NOT FOR NEW DESIGN  
M29F400T and M29F400B are replaced  
respectively by the M29F400BT and  
M29F400BB  
5V±10% SUPPLY VOLTAGE for PROGRAM,  
ERASE and READOPERATIONS  
FAST ACCESS TIME: 55ns  
44  
FAST PROGRAMMING TIME  
– 10µs by Byte / 16µs by Word typical  
PROGRAM/ERASE CONTROLLER (P/E.C.)  
– Program Byte-by-Byte or Word-by-Word  
– Status Register bits and Ready/Busy Output  
MEMORY BLOCKS  
1
TSOP48 (N)  
12 x 20 mm  
SO44 (M)  
– Boot Block (Top or Bottom location)  
– Parameter and Main blocks  
BLOCK, MULTI-BLOCK and CHIP ERASE  
MULTI-BLOCK PROTECTION/TEMPORARY  
UNPROTECTION MODES  
ERASE SUSPEND and RESUME MODES  
Figure 1. Logic Diagram  
– Read and Program another Block during  
Erase Suspend  
LOW POWER CONSUMPTION  
– Stand-by and Automatic Stand-by  
100,000 PROGRAM/ERASE CYCLES per  
BLOCK  
V
CC  
20 YEARS DATA RETENTION  
– Defectivity below 1ppm/year  
ELECTRONIC SIGNATURE  
18  
15  
A0-A17  
DQ0-DQ14  
– Manufacturer Code: 0020h  
– Device Code, M29F400T: 00D5h  
– Device Code, M29F400B: 00D6h  
W
E
DQ15A–1  
BYTE  
RB  
M29F400T  
M29F400B  
G
DESCRIPTION  
RP  
The M29F400 is a non-volatile memory that may  
be erased electrically at the block or chip level and  
programmed in-system on a Byte-by-Byte or Word-  
by-Word basis using only a single 5V VCC supply.  
For Program and Erase operations the necessary  
high voltages are generated internally. The device  
can also be programmed in standard program-  
mers.  
V
SS  
AI01726B  
The array matrix organisation allows each block to  
be erased and reprogrammed without affecting  
other blocks. Blocks can be protected against pro-  
November 1999  
1/34  
This is information on a productstil l in production but not recommendedfor new designs.  

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