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M28C16-120MS1T PDF预览

M28C16-120MS1T

更新时间: 2024-09-29 22:46:47
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
18页 130K
描述
16K 2K x 8 PARALLEL EEPROM with SOFTWARE DATA PROTECTION

M28C16-120MS1T 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:24
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.3
Is Samacsys:N最长访问时间:120 ns
JESD-30 代码:R-PDSO-G24长度:15.4 mm
内存密度:16384 bit内存集成电路类型:EEPROM
内存宽度:8功能数量:1
端子数量:24字数:2048 words
字数代码:2000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:2KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL编程电压:5 V
认证状态:Not Qualified座面最大高度:2.65 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:7.5 mm
Base Number Matches:1

M28C16-120MS1T 数据手册

 浏览型号M28C16-120MS1T的Datasheet PDF文件第2页浏览型号M28C16-120MS1T的Datasheet PDF文件第3页浏览型号M28C16-120MS1T的Datasheet PDF文件第4页浏览型号M28C16-120MS1T的Datasheet PDF文件第5页浏览型号M28C16-120MS1T的Datasheet PDF文件第6页浏览型号M28C16-120MS1T的Datasheet PDF文件第7页 
M28C16  
16K (2K x 8) PARALLEL EEPROM  
with SOFTWARE DATA PROTECTION  
NOT FOR NEW DESIGN  
FAST ACCESS TIME: 90ns  
SINGLE 5V ± 10% SUPPLY VOLTAGE  
LOW POWER CONSUMPTION  
FAST WRITE CYCLE:  
24  
– 64 Bytes Page WriteOperation  
– Byte or Page Write Cycle: 3ms Max  
ENHANCED END OF WRITE DETECTION:  
– Data Polling  
1
PDIP24 (P)  
PLCC32 (K)  
– ToggleBit  
PAGE LOAD TIMER STATUS BIT  
HIGH RELIABILITYSINGLE POLYSILICON,  
CMOS TECHNOLOGY:  
24  
– Endurance >100,000 Erase/Write Cycles  
– Data Retention >40 Years  
1
JEDEC APPROVED BYTEWIDE PIN OUT  
SOFTWARE DATA PROTECTION  
SO24 (MS)  
300 mils  
TSOP28 (N)  
8 x13.4mm  
M28C16 is replacedby the products  
described on the document M28C16A  
Figure 1. Logic Diagram  
DESCRIPTION  
The M28C16 is a 2K x 8 low power Parallel  
EEPROMfabricatedwithSGS-THOMSONproprie-  
tary single polysilicon CMOS technology. The de-  
vice offers fast access time with low power  
dissipation and requires a 5V power supply. The  
circuit has been designed to offer a flexible micro-  
controller interface featuring both hardware and  
softwarehandshakingwith DataPollingandToggle  
Bit. The M28C16 supports 64 byte page write op-  
eration. A Software Data Protection (SDP) is also  
possibleusing the standard JEDEC algorithm.  
V
CC  
11  
8
A0-A10  
DQ0-DQ7  
W
E
M28C16  
Table 1. Signal Names  
RB *  
A0 - A10  
Address Input  
DQ0 - DQ7 Data Input / Output  
G
W
Write Enable  
Chip Enable  
Output Enable  
Ready / Busy  
Supply Voltage  
Ground  
E
G
V
SS  
AI01518B  
RB  
VCC  
VSS  
Note: * RB function is offered only with TSOP28 package.  
November 1997  
1/18  
This is information on a product still in production but not recommended for new design.  

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