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M28256-20KA1T PDF预览

M28256-20KA1T

更新时间: 2024-10-26 22:46:47
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 存储内存集成电路可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
21页 133K
描述
256 Kbit 32Kb x8 Parallel EEPROM with Software Data Protection

M28256-20KA1T 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:QFJ包装说明:PLASTIC, LCC-32
针数:32Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.83Is Samacsys:N
最长访问时间:200 ns命令用户界面:NO
数据轮询:YES耐久性:100000 Write/Erase Cycles
JESD-30 代码:R-PQCC-J32JESD-609代码:e3
长度:13.995 mm内存密度:262144 bit
内存集成电路类型:EEPROM内存宽度:8
功能数量:1端子数量:32
字数:32768 words字数代码:32000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:32KX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC32,.5X.6
封装形状:RECTANGULAR封装形式:CHIP CARRIER
页面大小:64 words并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
编程电压:5 V认证状态:Not Qualified
座面最大高度:3.56 mm最大待机电流:0.0001 A
子类别:EEPROMs最大压摆率:0.03 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED切换位:YES
宽度:11.455 mm最长写入周期时间 (tWC):5 ms
Base Number Matches:1

M28256-20KA1T 数据手册

 浏览型号M28256-20KA1T的Datasheet PDF文件第2页浏览型号M28256-20KA1T的Datasheet PDF文件第3页浏览型号M28256-20KA1T的Datasheet PDF文件第4页浏览型号M28256-20KA1T的Datasheet PDF文件第5页浏览型号M28256-20KA1T的Datasheet PDF文件第6页浏览型号M28256-20KA1T的Datasheet PDF文件第7页 
M28256  
256 Kbit (32Kb x8) Parallel EEPROM  
with Software Data Protection  
PRELIMINARY DATA  
FASTACCESSTIME:  
– 90ns at 5V  
– 120ns at 3V  
SINGLE SUPPLY VOLTAGE:  
±
– 5V 10% for M28256  
28  
– 2.7V to 3.6V for M28256-xxW  
LOW POWER CONSUMPTION  
FAST WRITE CYCLE:  
1
PDIP28 (BS)  
PLCC32 (KA)  
– 64 Bytes Page Write Operation  
– Byte or Page Write Cycle  
ENHANCED END of WRITEDETECTION:  
– Data Polling  
28  
– Toggle Bit  
1
STATUS REGISTER  
HIGH RELIABILITYDOUBLE POLYSILICON,  
CMOS TECHNOLOGY:  
SO28 (MS)  
300 mils  
TSOP28 (NS)  
8 x13.4mm  
– Endurance >100,000 Erase/Write Cycles  
– Data Retention >10 Years  
JEDEC APPROVEDBYTEWIDE PIN OUT  
ADDRESS and DATA LATCHED ON-CHIP  
SOFTWARE DATA PROTECTION  
Figure 1. Logic Diagram  
V
CC  
DESCRIPTION  
The M28256and M28256-Ware 32K x8 low power  
ParallelEEPROMfabricatedwithSTMicroelectron-  
ics proprietary double polysilicon CMOS technol-  
ogy.  
15  
8
A0-A14  
DQ0-DQ7  
W
E
M28256  
Table 1. Signal Names  
A0-A14  
Address Input  
Data Input / Output  
Write Enable  
Chip Enable  
DQ0-DQ7  
G
W
E
V
SS  
G
Output Enable  
Supply Voltage  
Ground  
AI01885  
VCC  
VSS  
January 1999  
1/21  
This is preliminaryinformationon a new productnow in developmentor undergoingevaluation.Detail s aresubject to change without notice.  

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