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M24L416256DA-60BEG PDF预览

M24L416256DA-60BEG

更新时间: 2024-02-17 00:11:16
品牌 Logo 应用领域
晶豪 - ESMT 存储内存集成电路静态存储器
页数 文件大小 规格书
15页 313K
描述
4-Mbit (256K x 16) Pseudo Static RAM

M24L416256DA-60BEG 技术参数

生命周期:Contact Manufacturer零件包装代码:TSOP2
包装说明:TSOP2,针数:44
Reach Compliance Code:unknownECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.74
最长访问时间:60 nsJESD-30 代码:R-PDSO-G44
长度:18.41 mm内存密度:4194304 bit
内存集成电路类型:PSEUDO STATIC RAM内存宽度:16
功能数量:1端子数量:44
字数:262144 words字数代码:256000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:256KX16
封装主体材料:PLASTIC/EPOXY封装代码:TSOP2
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.8 mm端子位置:DUAL
宽度:10.16 mmBase Number Matches:1

M24L416256DA-60BEG 数据手册

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ESMT  
M24L416256DA  
PSRAM  
4-Mbit (256K x 16) Pseudo Static RAM  
Features  
reducing power consumption dramatically when deselected  
• Advanced low-power architecture  
•High speed: 55 ns, 60 ns and 70 ns  
•Wide voltage range: 2.7V to 3.6V  
•Typical active current: 1 mA @ f = 1 MHz  
•Low standby power  
( CE1 HIGH, CE2 LOW or both BHE and BLE are HIGH).  
The input/output pins (I/O0 through I/O15) are placed in a  
high-impedance state when: deselected ( CE1 HIGH, CE2  
LOW, OE is HIGH), or during a write operation (Chip  
Enabled and Write Enable WE LOW).  
Reading from the device is accomplished by asserting the  
Chip Enables ( CE1 LOW and CE2 HIGH) and Output  
Enable( OE ) LOW while forcing the Write Enable ( WE ) HIGH.  
•Automatic power-down when deselected  
Functional Description  
If Byte Low Enable (BLE ) is LOW, then data from the memory  
location specified by the address pins A0 through A17 will  
The M24L416256DA is a high-performance CMOS pseudo  
static RAM (PSRAM) organized as 256K words by 16 bits that  
supports an asynchronous memory interface. This device  
features advanced circuit design to provide ultra-low active  
current. This is ideal for portable applications such as cellular  
telephones. The device can be put into standby mode  
appear on I/O0 to I/O7. If Byte High Enable (BHE ) is LOW,  
then data from memory will appear on I/O8 to I/O15. See the  
Truth Table for a complete description of read and write  
modes.  
Elite Semiconductor Memory Technology Inc.  
Publication Date: Jul. 2008  
Revision: 1.5  
1/15  

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