生命周期: | Contact Manufacturer | 包装说明: | LFBGA, |
Reach Compliance Code: | unknown | 风险等级: | 5.67 |
访问模式: | FOUR BANK PAGE BURST | 最长访问时间: | 0.7 ns |
其他特性: | AUTO/SELF REFRESH | JESD-30 代码: | S-PBGA-B144 |
长度: | 12 mm | 内存密度: | 134217728 bit |
内存集成电路类型: | DDR DRAM | 内存宽度: | 32 |
功能数量: | 1 | 端口数量: | 1 |
端子数量: | 144 | 字数: | 4194304 words |
字数代码: | 4000000 | 工作模式: | SYNCHRONOUS |
最高工作温度: | 70 °C | 最低工作温度: | |
组织: | 4MX32 | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | LFBGA | 封装形状: | SQUARE |
封装形式: | GRID ARRAY, LOW PROFILE, FINE PITCH | 座面最大高度: | 1.4 mm |
自我刷新: | YES | 最大供电电压 (Vsup): | 2.625 V |
最小供电电压 (Vsup): | 2.357 V | 标称供电电压 (Vsup): | 2.5 V |
表面贴装: | YES | 技术: | CMOS |
温度等级: | COMMERCIAL | 端子形式: | BALL |
端子节距: | 0.8 mm | 端子位置: | BOTTOM |
宽度: | 12 mm | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
M13S128324A-4LG | ESMT |
获取价格 |
1M x 32 Bit x 4 Banks Double Data Rate SDRAM | |
M13S128324A-5BG | ESMT |
获取价格 |
1M x 32 Bit x 4 Banks Double Data Rate SDRAM | |
M13S128324A-5BG2M | ESMT |
获取价格 |
DDR DRAM, 4MX32, 0.7ns, CMOS, PBGA144, 12 X 12 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, LEAD FRE | |
M13S128324A-5BIG | ESMT |
获取价格 |
1M x 32 Bit x 4 Banks Double Data Rate SDRAM | |
M13S128324A-5BIG2M | ESMT |
获取价格 |
DDR DRAM, 4MX32, 0.7ns, CMOS, PBGA144, 12 X 12 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, LEAD FRE | |
M13S128324A-5LG | ESMT |
获取价格 |
1M x 32 Bit x 4 Banks Double Data Rate SDRAM | |
M13S128324A-5LIG | ESMT |
获取价格 |
1M x 32 Bit x 4 Banks Double Data Rate SDRAM | |
M13S128324A-6BG | ESMT |
获取价格 |
1M x 32 Bit x 4 Banks Double Data Rate SDRAM | |
M13S128324A-6BG2M | ESMT |
获取价格 |
DDR DRAM, 4MX32, 0.7ns, CMOS, PBGA144, 12 X 12 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, LEAD FRE | |
M13S128324A-6BIG | ESMT |
获取价格 |
1M x 32 Bit x 4 Banks Double Data Rate SDRAM |