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M12S16161A-10T PDF预览

M12S16161A-10T

更新时间: 2024-09-26 05:44:31
品牌 Logo 应用领域
晶豪 - ESMT 动态存储器
页数 文件大小 规格书
28页 866K
描述
512K x 16Bit x 2Banks Synchronous DRAM

M12S16161A-10T 数据手册

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ESMT  
M12S16161A  
SDRAM  
512K x 16Bit x 2Banks  
Synchronous DRAM  
FEATURES  
GENERAL DESCRIPTION  
The M12S16161A is 16,777,216 bits synchronous high  
data rate Dynamic RAM organized as 2 x 524,288 words by  
16 bits, fabricated with high performance CMOS technology.  
Synchronous design allows precise cycle control with the  
use of system clock I/O transactions are possible on every  
clock cycle. Range of operating frequencies, programmable  
burst length and programmable latencies allow the same  
device to be useful for a variety of high bandwidth, high  
performance memory system applications.  
2.5V power supply  
LVCMOS compatible with multiplexed address  
Dual banks operation  
MRS cycle with address key programs  
-
-
-
CAS Latency (1, 2 & 3 )  
Burst Length (1, 2, 4, 8 & full page)  
Burst Type (Sequential & Interleave)  
EMRS cycle with address key programs.  
All inputs are sampled at the positive going edge of the  
system clock  
Burst Read Single-bit Write operation  
Special Function Support.  
ORDERING INFORMATION  
-
-
-
PASR (Partial Array Self Refresh )  
TCSR (Temperature compensated Self Refresh)  
DS (Driver Strength)  
MAX  
Part NO.  
Interface Package Comments  
Freq.  
Non-Pb-free  
Non-Pb-free  
Pb-free  
Pb-free  
M12S16161A-10T  
M12S16161A-15T  
100MHz  
66MHz  
DQM for masking  
50  
Auto & self refresh  
LVCMOS  
TSOP(II)  
M12S16161A-10TG 100MHz  
32ms refresh period (2K cycle)  
M12S16161A-15TG  
66MHz  
PIN CONFIGURATION (TOP VIEW)  
VDD  
1
2
3
4
5
6
7
8
VSS  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
DQ0  
DQ1  
VSSQ  
DQ2  
DQ3  
VDDQ  
DQ4  
DQ5  
VSSQ  
DQ6  
DQ7  
VDDQ  
LDQM  
WE  
CAS  
RAS  
CS  
BA  
A10/AP  
A0  
DQ15  
DQ14  
VSSQ  
DQ13  
DQ12  
VDDQ  
DQ11  
DQ10  
VSSQ  
DQ9  
DQ8  
VDDQ  
N.C/RFU  
UDQM  
CLK  
CKE  
N.C  
A9  
A8  
A7  
A6  
A5  
A4  
VSS  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
A1  
A2  
A3  
VDD  
50PIN TSOP(II)  
(400mil x 825mil)  
(0.8 mm PIN PITCH)  
Elite Semiconductor Memory Technology Inc.  
Publication Date : Jun. 2005  
Revision : 1.0 1/28  

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