Datasheet > M12L64164A-6BIG2M

M12L64164A-6BIG2M

更新时间： 2024-01-28 00:18:36

品牌	Logo	应用领域
晶豪 - ESMT		动态存储器
页数	文件大小	规格书
45页	1259K
描述
Synchronous DRAM, 4MX16, 5.4ns, CMOS, PBGA54, 8 X 8 MM, 1 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, VBGA-54

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ESMT

M12L64164A (2M)

Operation Temperature Condition -40°C~85°C

SDRAM

1M x 16 Bit x 4 Banks

Synchronous DRAM

FEATURES

ORDERING INFORMATION

MAX

FREQ.

JEDEC standard 3.3V power supply

LVTTL compatible with multiplexed address

Four banks operation

MRS cycle with address key programs

- CAS Latency (2 & 3)

- Burst Length (1, 2, 4, 8 & full page)

- Burst Type (Sequential & Interleave)

All inputs are sampled at the positive going edge of the

system clock

PRODUCT NO.

PACKAGE Comments

M12L64164A-5TIG2M

M12L64164A-6TIG2M

200MHz 54 TSOP II

166MHz 54 TSOP II

143MHz 54 TSOP II

Pb-free

M12L64164A-7TIG2M

M12L64164A-5BIG2M

M12L64164A-6BIG2M

M12L64164A-7BIG2M

Pb-free

200MHz

166MHz

143MHz

54 VBGA

DQM for masking

Auto & self refresh

15.6 μ s refresh interval

GENERAL DESCRIPTION

The M12L64164A is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 1,048,576 words by

16 bits. Synchronous design allows precise cycle controls with the use of system clock I/O transactions are possible on

every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same

device to be useful for a variety of high bandwidth, high performance memory system applications.

PIN CONFIGURATION (TOP VIEW)

BALL CONFIGURATION (TOP VIEW)

(TSOPII 54L, 400milX875mil Body, 0.8mm Pin Pitch )

(BGA54, 8mmX8mmX1mm Body, 0.8mm Ball Pitch)

5 4

5 3

5 2

5 1

5 0

4 9

4 8

4 7

4 6

4 5

4 4

4 3

4 2

4 1

4 0

3 9

3 8

3 7

3 6

3 5

3 4

3 3

3 2

3 1

3 0

2 9

2 8

VSS

VDD

DQ0

VDDQ

DQ1

DQ2

VSSQ

DQ3

DQ4

VDDQ

DQ5

DQ6

VSSQ

DQ7

VDD

DQ15

VS SQ

DQ14

DQ13

VDDQ

DQ12

DQ11

VS SQ

DQ10

DQ9

VDDQ

DQ8

VS S

VDDQ

DQ15

VSSQ

DQ0

VDD

VSS

VSSQ

VDDQ

DQ2

DQ4

DQ1

DQ3

DQ14

DQ12

DQ13

DQ11

VDDQ

VSSQ

VDD

VDDQ

VSS

DQ6

DQ10

DQ8

DQ9

DQ5

DQ7

LDQM

UDQM

CLK

A11

CKE

CAS

BA0

RAS

BA1

UDQM

CLK

CKE

CAS

RAS

A11

BA0

BA1

A10/AP

A10

VSS

VDD

VS S

VDD

Elite Semiconductor Memory Technology Inc.

Publication Date: Jun. 2012

Revision: 1.2 1/45

12 3 4 5 6 7...45

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