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M11B11664A PDF预览

M11B11664A

更新时间: 2024-11-26 22:30:47
品牌 Logo 应用领域
其他 - ETC 动态存储器
页数 文件大小 规格书
15页 339K
描述
64 K x 16 DRAM EDO PAGE MODE

M11B11664A 数据手册

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M11B11664A  
DRAM  
64 K x 16 DRAM  
EDO PAGE MODE  
FEATURES  
ORDERING INFORMATION - PACKAGE  
X16 organization  
EDO (Extended Data-Output) access mode  
40-pin 400mil SOJ  
2 CAS Byte/Word Read/Write operation  
44 / 40-pin 400mil TSOP (TypeII)  
Single 5V ( ± 10%) power supply  
TTL-compatible inputs and outputs  
256-cycle refresh in 4ms  
PRODUCT NO.  
PACKING TYPE  
Refresh modes :RAS only, CAS BEFORE RAS (CBR)  
and HIDDEN  
M11B11664A-25J  
M11B11664A-30J  
M11B11664A-35J  
M11B11664A-40J  
M11B11664A-25T  
M11B11664A-30T  
M11B11664A-35T  
M11B11664A-40T  
JEDEC standard pinout  
SOJ  
Key AC Parameter  
RAC  
25  
30  
35  
40  
CAC  
8
RC  
PC  
t
t
t
t
-25  
-30  
-35  
-40  
43  
55  
65  
75  
10  
12  
14  
16  
9
TSOPII  
10  
11  
GENERAL DESCRIPTION  
The M11B11664A is a randomly accessed solid state memory, organized as 65,536 x 16 bits device. It offers Extended  
Data-Output , 5V( ± 10%) single power supply. Access time (-25,-30,-35,-40) and package type (SOJ, TSOP II) are optional  
features of this family. All these family have CAS - before -RAS ,RAS -only refresh and Hidden refresh capabilities.  
Two access modes are supported by this device : Byte access and Word access. Use only one of the two CAS and leave  
the other staying high will result in a BYTE access. WORD access happens when two CAS ( CASL , CASH ) are used. CASL  
transiting low during READ or WRITE cycle will output or input data into the lower byte (IO0~IO7), and CASH transiting low will  
output or input data into the upper byte (IO8~15).  
PIN ASSIGNMENT  
SOJ Top View  
TSOP (TypeII) Top View  
VCC  
I/O0  
I/O1  
I/O2  
I/O3  
VCC  
VSS  
VCC  
I/O0  
I/O1  
I/O2  
I/O3  
VCC  
I/O4  
I/O5  
I/O6  
I/O7  
NC  
VS S  
1
2
3
4
5
6
7
8
4 0  
3 9  
3 8  
3 7  
3 6  
3 5  
3 4  
3 3  
3 2  
3 1  
1
2
3
4
5
6
7
8
4 0  
3 9  
3 8  
3 7  
3 6  
3 5  
3 4  
3 3  
3 2  
3 1  
3 0  
2 9  
2 8  
2 7  
2 6  
2 5  
2 4  
2 3  
2 2  
2 1  
I/O15  
I/O14  
I/O13  
I/O12  
VSS  
I/O15  
I/O14  
I/O13  
I/O12  
VS S  
I/O4  
I/O5  
I/O6  
I/O7  
I/O11  
I/O10  
I/O9  
I/O11  
I/O10  
I/O9  
I/O8  
N C  
9
1 0  
9
I/O8  
1 0  
1 1  
1 2  
1 3  
1 4  
1 5  
1 6  
1 7  
1 8  
1 9  
2 0  
N C  
CASL  
C ASH  
OE  
NC  
NC  
W E  
RAS  
NC  
A0  
1 1  
1 2  
1 3  
1 4  
1 5  
1 6  
1 7  
1 8  
1 9  
2 0  
3 0  
2 9  
2 8  
2 7  
2 6  
2 5  
2 4  
2 3  
2 2  
2 1  
CASL  
CASH  
OE  
NC  
WE  
RAS  
NC  
N C  
N C  
A7  
A7  
A0  
A6  
A1  
A1  
A6  
A5  
A2  
A2  
A5  
A4  
A3  
A3  
A4  
V
S S  
VCC  
VSS  
VCC  
Elite Memory Technology Inc  
Publication Date : Dec. 2000  
Revision : 1.3 1/15  

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