Datasheet > LY62L12916LL-70SLIT

LY62L12916LL-70SLIT

更新时间： 2024-11-17 00:23:59

品牌	Logo	应用领域
台湾来扬 - LYONTEK		静态存储器
页数	文件大小	规格书
17页	467K
描述
128K X 16 BIT LOW POWER CMOS SRAM

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LY62L12916

128K X 16 BIT LOW POWER CMOS SRAM

Rev. 1.0

REVISION HISTORY

Revision

Rev. 0.1

Rev. 0.2

Rev. 0.3

Description

Initial Issue

Revised Package Outline Dimension(TSOP-II)

Issue Date

May.20.2005

Apr.12.2007

Apr.17.2009

FEATURES ORDERING INFORMATION

Revised

Lead free and green package available to Green package

available

ORDERING INFORMATION

Added packing type in

Revised V_TERMto V_T1and V_T2

ABSOLUTE MAXIMUN RATINGS

Deleted T_SOLDERin

Revised Test Condition of I_SB1/I_DR

Rev. 0.4

Jun.15.2009

℃

Added I_SB1/I_DRvalues when T_A= 25 and T_A= 40

Added SL grade

Deleted L grade

Rev. 0.5

Rev. 0.6

Rev. 1.0

May.6.2010

Aug.30.2010

Aug.29.2013

PACKAGE OUTLINE DIMENSION

Revised

in page 12

ORDERING INFORMATION

Revised Notes item 1 and 2 in page 4

Revised

in page 13

1. V_IH(max) = V_CC+ 2.0V for pulse width less than 6ns.

2. V_IL(min) = V_SS- 2.0V for pulse width less than 6ns.

ORDERING INFORMATION

Revised

Lyontek Inc. ^{reserves the rights to change the specifications and products without notice.}

5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.

TEL: 886-3-6668838

FAX: 886-3-6668836

12 3 4 5 6 7...17

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