Datasheet > LTC6957-3

LTC6957-3

更新时间： 2024-11-16 01:13:39

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
38页	1416K
描述
Low Phase Noise, Dual Output Logic Converter

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中文翻译

获取价格

数据手册

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LTC6957-3 数据手册

LTC6957-1/LTC6957-2/

LTC6957-3/LTC6957-4

Low Phase Noise, Dual

Output Buffer/Driver/

Logic Converter

FEATURES

DESCRIPTION

Low Phase Noise Buffer/Driver

The LTC^®6957-1/LTC6957-2/LTC6957-3/LTC6957-4 is a

family of very low phase noise, dual output AC signal

buffer/driver/logic level translators. The input signal can

be a sine wave or any logic level (≤2V ). There are four

members of the family that differ in^Pt^-h^Peir output logic

signal type as follows:

Optimized Conversion of Sine Wave Signals to

Logic Levels

Three Logic Output Types Available

LVPECL

LVDS

CMOS

LTC6957-1: LVPECL Logic Outputs

Additive Jitter 45fs

(LTC6957-1)

RMS

LTC6957-2: LVDS Logic Outputs

Frequency Range Up to 300MHz

3.15V to 3.45V Supply Operation

Low Skew 3ps Typical

Fully Specified from –40°C to 125°C

12-Lead MSOP and 3mm × 3mm DFN Packages

LTC6957-3: CMOS Logic, In-Phase Outputs

LTC6957-4: CMOS Logic, Complementary Outputs

The LTC6957 will buffer and distribute any logic signal

with minimal additive noise, however, the part really

excels at translating sine wave signals to logic levels. The

early amplifier stages have selectable lowpass filtering

to minimize the noise while still amplifying the signal to

increase its slew rate. This input stage filtering/noise limit-

ing is especially helpful in delivering the lowest possible

phase noise signal with slow slewing input signals such

as a typical 10MHz sine wave system reference.

APPLICATIONS

System Reference Frequency Distribution

High Speed ADC, DAC, DDS Clock Driver

Military and Secure Radio

Low Noise Timing Trigger

Broadband Wireless Transceiver

High Speed Data Acquisition

Medical Imaging

Test and Measurement

All registered trademarks and trademarks are the property of their respective owners. Protected

by U.S. Patents 7969189 and 8319551.

TYPICAL APPLICATION

3.3V

Additive Phase Noise at 100MHz

0.1µF

ꢑꢏꢙꢐ

ꢂꢔꢈꢢꢞꢃꢟꢃꢈꢡꢃꢡ ꢂꢔꢈꢃ ꢣꢓꢠꢃ ꢔꢈꢒꢇꢄ

ꢓꢄ ꢤ7ꢕꢖꢥ ꢋ5ꢐꢐꢥꢠ

ꢎ

ꢅꢝꢂ

ꢁꢔꢞꢄꢓ ꢦ ꢁꢔꢞꢄꢖ ꢦ ꢢꢈꢡ

SD1

ꢑꢏꢙ5

ꢑꢏ5ꢐ

ꢑꢏ55

ꢑꢏ6ꢐ

ꢑꢏ65

FILTA

FILTB

TO PLL CHIPS

OR SYSTEM

SAMPLING CLOCKS

ꢞꢄꢉ6957ꢟꢛ ꢋꢞꢠꢡꢂꢎ

ꢞꢄꢉ6957ꢟꢙ ꢋꢉꢝꢀꢂꢎ

OUT1

100MHz

+7dBm

SINE WAVE

10nF

OCXO

–

50Ω

10nF

OUT2

ꢞꢄꢉ6957ꢟꢜ

ꢋꢉꢝꢀꢂꢎ

ꢞꢄꢉ6957ꢟꢏ ꢋꢞꢠꢒꢃꢉꢞꢎ

ꢏꢚ ꢏꢐꢚ

ꢀꢁꢁꢂꢃꢄ ꢁꢅꢃꢆꢇꢃꢈꢉꢊ ꢋꢌꢍꢎ

GND

SD2

6957 TA01a

ꢏꢐꢐ

ꢏꢐꢐꢚ

ꢏꢝ

6957ꢏꢛꢜꢙ ꢄꢓꢐꢏb

6957fb

For more information www.linear.com/LTC6957-1

12 3 4 5 6 7...38

中文翻译

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与LTC6957-3相关器件

型号	品牌	获取价格	描述	数据表
LTC6957-3_15	Linear	获取价格	Low Phase Noise, Dual Output Buffer/Driver/ Logic Converter
LTC6957-4	Linear	获取价格	280MHz, 2.9ns Comparator Family with Rail-to-Rail Inputs and CMOS Outputs
LTC6957-4	ADI	获取价格	Low Phase Noise, Dual Output Logic Converter
LTC6957-4_15	Linear	获取价格	Low Phase Noise, Dual Output Buffer/Driver/ Logic Converter
LTC695C	Linear	获取价格	Microprocessor Supervisory Circuits
LTC695C-3.3	Linear	获取价格	3.3V Microprocessor Supervisory Circuits
LTC695CJ	Linear	获取价格	IC 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, CDIP16, 0.300 INCH, HERMETIC SEALED, CERDIP-16,
LTC695CN	Linear	获取价格	Microprocessor Supervisory Circuits
LTC695CN#PBF	Linear	获取价格	LTC695 - Microprocessor Supervisory Circuits; Package: PDIP; Pins: 16; Temperature Range:
LTC695CN-3.3	Linear	获取价格	3.3V Microprocessor Supervisory Circuits

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