Datasheet > LTC6952

LTC6952

更新时间： 2024-11-16 14:58:19

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
80页	3072K
描述
具有 11 个输出并支持 JESD204B / JESD204C 协议的超低抖动、4.5GHz PLL

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中文翻译

获取价格

数据手册

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LTC6952 数据手册

LTC6952

Ultralow Jitter, 4.5GHz PLL

with 11 Outputs and JESD204B/JESD204C Support

FEATURES

DESCRIPTION

JESD204B/C, Subclass 1 SYSREF Signal Generation

Low Noise Integer-N PLL

The LTC^®6952 is a high performance, ultralow jitter,

JESD204B/C clock generation and distribution IC. It

includes a Phase Locked Loop (PLL) core, consisting of

a reference divider, phase-frequency detector (PFD) with

a phase-lock indicator, ultralow noise charge pump and

integer feedback divider. The LTC6952’s eleven outputs

can be configured as up to five JESD204B/C subclass

1 device clock/SYSREF pairs plus one general purpose

output,orsimplyelevengeneralpurposeclockoutputsfor

non-JESD204B/C applications. Each output has its own

individually programmable frequency divider and output

driver. All outputs can also be synchronized and set to

precisephasealignmentusingindividualcoarsehalf-cycle

digital delays and fine analog time delays.

Additive Output Jitter < 6fs

RMS

(Integration BW = 12kHz to 20MHz, f = 4.5GHz)

Additive Output Jitter 65fs

(ADC SNR Method)

RMS

EZSync™, ParallelSync™ Multichip Synchronization

–229dBc/Hz Normalized In-Band Phase Noise Floor

–281dBc/Hz Normalized In-Band 1/f Noise

Eleven Independent, Low Noise Outputs with

Programmable Coarse Digital and Fine Analog Delays

Flexible Outputs Can Serve as Either a Device Clock

or SYSREF Signal

Reference Input Frequency up to 500MHz

LTC6952Wizard™ Software Design Tool Support

–40ºC to 125°C Operating Junction Temperature Range

For applications requiring more than eleven total outputs,

multiple LTC6952s can be connected together using the

EZSync or ParallelSync synchronization protocols.

APPLICATIONS

High Performance Data Converter Clocking

All registered trademarks and trademarks are the property of their respective owners. Protected

by U.S. Patents, including 8319551 and 8819472.

Wireless Infrastructure

Test and Measurement

TYPICAL APPLICATION

ꢀꢁꢀꢂ

ꢀ

LTC6952 Phase Noise

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Rꢀꢁ

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ꢀꢁꢂ

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ꢀꢁ00

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ꢀꢁꢂꢃ ꢀ00ꢁꢂꢃ ꢄꢅꢆ ꢆꢇꢈꢆꢉ

48.7Ω

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ꢀꢁꢂ0

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ꢀꢀꢁꢂ

48.7Ω

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ꢀꢁꢂꢃ ꢀꢁꢂꢃꢄꢅ ꢆꢇꢈꢉ ꢊꢋꢌꢊꢍ

ꢀꢁꢂꢃꢄ

0ꢀꢁꢂꢃꢄ

ꢀꢁꢂꢃꢄꢅꢆ

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30Ω

75Ω

ꢀꢁꢂꢃꢄeꢅ

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ꢀꢁꢂ

ꢀꢁꢀꢂꢃꢃꢀꢀꢄ

ꢀ000ꢁꢀ000

0ꢀꢁꢂꢃ

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ꢀꢁꢂꢃ

ꢀ

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ꢀ00ꢁꢂꢃ

ꢀꢁꢂꢃe

ꢀꢁ

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0ꢀꢁꢂꢃ

ꢀꢁꢁꢂꢃꢄ ꢁRꢃꢅꢆꢃꢇꢈꢉ ꢊꢋꢌꢍ

100Ω

ꢀ

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Rꢀꢁ

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49.9Ω

ꢀ

100Ω

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ꢀꢁꢂꢃ ꢄꢅ0ꢆꢇ

Rev 0

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中文翻译

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与LTC6952相关器件

型号	品牌	获取价格	描述	数据表
LTC6953	ADI	获取价格	具有 11 个输出并支持 JESD204B/JESD204C 协议的超低抖动、4.5GHz
LTC695-3.3	Linear	获取价格	3.3V Microprocessor Supervisory Circuits
LTC695-3.3	ADI	获取价格	3.3V 微处理器监控电路
LTC695-3.3_15	Linear	获取价格	3.3V Microprocessor Supervisory Circuits
LTC695-3.3CSW	Linear	获取价格	IC 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO16, 0.300 INCH, PLASTIC, SOP-16, Power Manag
LTC6955	ADI	获取价格	超低抖动 7.5GHz 11 输出扇出缓冲器系列
LTC6957-1	Linear	获取价格	Low Phase Noise, Dual Output Buffer/Driver/Logic Converter
LTC6957-1	ADI	获取价格	Low Phase Noise, Dual Output Logic Converter
LTC6957-1_15	Linear	获取价格	Low Phase Noise, Dual Output Buffer/Driver/ Logic Converter
LTC6957-2	ADI	获取价格	Low Phase Noise, Dual Output Logic Converter

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