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LTC2657BIUFD-L16PBF PDF预览

LTC2657BIUFD-L16PBF

更新时间: 2024-09-21 11:41:55
品牌 Logo 应用领域
凌特 - Linear /
页数 文件大小 规格书
24页 1449K
描述
Octal I2C 16-/12-Bit Rail-to-Rail DACs with 10ppm/°C Max Reference

LTC2657BIUFD-L16PBF 数据手册

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LTC2657  
2
Octal I C 16-/12-Bit  
Rail-to-Rail DACs with  
10ppm/°C Max Reference  
DESCRIPTION  
FEATURES  
2
The LTC®2657 is a family of octal I C 16-/12-Bit Rail-to-  
n
Integrated Reference 10ppm/°C Max  
n
Maximum INL Error: ±±LꢀS  
Rail DACs with Integrated 10ppm/°C Max Reference. The  
DACs have built-in high performance, rail-to-rail, output  
buffersandareguaranteedmonotonic. TheLTC2657-Lhas  
afull-scaleoutputof2.5Vwiththeintegratedreferenceand  
operatesfromasingle2.7Vto5.5Vsupply. TheLTC2657-H  
hasafull-scaleoutputof4.096Vwiththeintegratedreference  
andoperatesfroma4.5Vto5.5Vsupply.EachDACcanalso  
operatewithanexternalreference, whichsetsthefull-scale  
output to 2 times the external reference voltage.  
n
Guaranteed Monotonic Over Temperature  
n
ꢀelectable Internal or External Reference  
n
2.7V to 5.5V Supply Range (LTC2657-L)  
n
Integrated Reference Buffers  
n
Ultralow Crosstalk between DACs(0.8nV•s)  
n
Power-On-Reset to Zero-Scale/Mid-Scale  
2
n
400kHz I C Interface  
n
Tiny 20-Lead 4mm × 5mm QFN and 20-Lead  
Thermally enhanced TSSOP packages  
2
The parts use a 2-wire I C compatible serial interface. The  
LTC2657 operates in both the standard mode (maximum  
clock rate of 100kHz) and the fast mode (maximum clock  
rateof400kHz).TheLTC2657incorporatesapower-onreset  
circuitthatiscontrolledbythePORSELpin.IfPORSEListied  
toGNDtheDACsresettozero-scaleatpower-up.IfPORSEL  
APPLICATIONS  
n
Mobile Communications  
n
Process Control and Industrial Automation  
n
Instrumentation  
Automatic Test Equipment  
n
is tied to V , the DACs reset to mid-scale at power-up.  
CC  
n
Automotive  
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other  
trademarks are the property of their respective owners. Protected by U.S. Patents including  
5396245, 6891433 and patent pending.  
BLOCK DIAGRAM  
INTERNAL REFERENCE  
REFCOMP  
REFIN/OUT  
REF  
INL vs Code (LTC2657-16)  
GND  
V
CC  
REFLO  
4
3
V
DAC A  
DAC H  
DAC G  
DAC F  
V
V
V
V
OUTA  
OUTH  
OUTG  
OUTF  
OUTE  
2
1
V
DAC B  
DAC C  
DAC D  
OUTB  
0
–1  
–2  
–3  
–4  
DAC A  
DAC B  
DAC C  
DAC D  
DAC E  
V
OUTC  
DAC F  
DAC G  
DAC H  
32768  
CODE  
128  
16384  
49152  
65535  
V
DAC E  
OUTD  
2657 TA01  
POWER-ON RESET  
PORSEL  
CA0  
CA1  
32-BIT SHIFT REGISTER  
2-WIRE INTERFACE  
SDA  
SCL  
CA2  
LDAC  
2657 BD  
2657f  
1

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