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LTC2209CUP#TR PDF预览

LTC2209CUP#TR

更新时间: 2024-11-26 19:56:51
品牌 Logo 应用领域
凌特 - Linear 转换器
页数 文件大小 规格书
32页 1039K
描述
LTC2209 - 16-Bit, 160Msps ADC; Package: QFN; Pins: 64; Temperature Range: 0°C to 70°C

LTC2209CUP#TR 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:QFN包装说明:HVQCCN, LCC64,.35SQ,20
针数:64Reach Compliance Code:not_compliant
ECCN代码:3A001.A.5.A.5HTS代码:8542.39.00.01
风险等级:5.34最大模拟输入电压:1.5 V
最小模拟输入电压:1 V转换器类型:ADC, PROPRIETARY METHOD
JESD-30 代码:S-PQCC-N64JESD-609代码:e0
长度:9 mm最大线性误差 (EL):0.0084%
湿度敏感等级:1模拟输入通道数量:1
位数:16功能数量:1
端子数量:64最高工作温度:70 °C
最低工作温度:输出位码:OFFSET BINARY, 2'S COMPLEMENT BINARY
输出格式:PARALLEL, WORD封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装等效代码:LCC64,.35SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):235电源:3.3 V
认证状态:Not Qualified采样速率:160 MHz
采样并保持/跟踪并保持:SAMPLE座面最大高度:0.8 mm
子类别:Analog to Digital Converters标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:20
宽度:9 mmBase Number Matches:1

LTC2209CUP#TR 数据手册

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LTC2209  
16-Bit, 160Msps ADC  
FEATURES  
DESCRIPTION  
n
Sample Rate: 160Msps  
TheLTC®2209isa160Msps16-bitA/Dconverterdesigned  
for digitizing high frequency, wide dynamic range signals  
with input frequencies up to 700MHz. The input range of  
the ADC can be optimized with the PGA front end.  
n
77.3dBFS Noise Floor  
n
100dB SFDR  
n
SFDR >84dB at 250MHz (1.5V Input Range)  
PGA Front End (2.25V or 1.5V Input Range)  
700MHz Full Power Bandwidth S/H  
Optional Internal Dither  
P-P  
n
n
n
n
n
n
n
n
n
P-P  
P-P  
The LTC2209 is perfect for demanding communications  
applications,withACperformancethatincludes77.3dBFS  
Noise Floor and 100dB spurious free dynamic range  
Optional Data Output Randomizer  
LVDS or CMOS Outputs  
(SFDR). Ultra low jitter of 70fs  
allows undersampling  
RMS  
ofhighinputfrequencieswithexcellentnoiseperformance.  
Maximum DC specs include ±±LSB ꢀNL, ±1LSB DNL (no  
missing codes).  
Single 3.3V Supply  
Power Dissipation: 1.4±W  
Clock Duty Cycle Stabilizer  
The digital output can be either differential LVDS or  
single-ended CMOS. There are two format options for  
the CMOS outputs: a single bus running at the full data  
rate or demultiplexed busses running at half data rate. A  
separate output power supply allows the CMOS output  
swing to range from 0.±V to 3.6V.  
Pin-Compatible Family:  
130Msps: LTC2208 (16-Bit), LTC2208-14 (14-Bit)  
10±Msps: LTC2217 (16-Bit)  
64-Pin (9mm × 9mm) QFN Package  
n
APPLICATIONS  
+
The ENC and ENC inputs may be driven differentially  
or single-ended with a sine wave, PECL, LVDS, TTL or  
CMOS inputs. An optional clock duty cycle stabilizer al-  
lows high performance at full speed with a wide range of  
clock duty cycles.  
n
Telecommunications  
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Receivers  
n
Cellular Base Stations  
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Spectrum Analysis  
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ꢀmaging Systems  
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.  
All other trademarks are the property of their respective owners.  
n
ATE  
TYPICAL APPLICATION  
3.3V  
SENSE  
64k Point FFT, fIN = 15.1MHz,  
–1dBFS, PGA = 0  
OV  
DD  
1.2±V  
COMMON MODE  
BꢀAS VOLTAGE  
ꢀNTERNAL ADC  
REFERENCE  
GENERATOR  
V
0.±V TO 3.6V  
0
CM  
1μF  
–10  
2.2μF  
–20  
OF  
CLKOUT  
D1±  
–30  
–40  
–±0  
–60  
–70  
+
AꢀN  
+
16-BꢀT  
PꢀPELꢀNED  
ADC CORE  
OUTPUT  
DRꢀVERS  
CORRECTꢀON  
LOGꢀC AND  
SHꢀFT REGꢀSTER  
CMOS  
OR  
LVDS  
ANALOG  
ꢀNPUT  
S/H  
AMP  
AꢀN  
D0  
–80  
–90  
OGND  
–100  
–110  
–120  
–130  
CLOCK/DUTY  
CYCLE  
CONTROL  
3.3V  
1μF  
V
DD  
1μF  
1μF  
GND  
0
10 20 30 40 ±0 60 70 80  
2209 TA01  
FREQUENCY (MHz)  
2209 TA01b  
+
ENC  
ENC  
PGA SHDN DꢀTH MODE LVDS RAND  
ADC CONTROL ꢀNPUTS  
2209fa  
1

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