Datasheet > LTC2143-12

LTC2143-12

更新时间： 2024-09-24 11:42:03

品牌	Logo	应用领域
凌特 - Linear		/
页数	文件大小	规格书
36页	1008K
描述
12-Bit, 125Msps/105Msps/ 80Msps Low Power Dual ADCs

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中文翻译

获取价格

数据手册

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LTC2143-12 数据手册

Electrical Specifications Subject to Change

LTC2145-12/

LTC2144-12/LTC2143-12

12-Bit, 125Msps/105Msps/

80Msps Low Power Dual ADCs

FEATURES

DESCRIPTION

TheLTC^®2145-12/LTC2144-12/LTC2143-12are2-channel

simultaneous sampling 12-bit A/D converters designed

for digitizing high frequency, wide dynamic range signals.

They are perfect for demanding communications applica-

tions with AC performance that includes 70.6dB SNR and

89dB spurious free dynamic range (SFDR). Ultralow jitter

2-Channel Simultaneously Sampling ADC

70.6dB SNR

89dB SFDR

Low Power: 183mW/144mW/109mW Total

92mW/72mW/55mW per Channel

Single 1.8V Supply

CMOS, DDR CMOS, or DDR LVDS Outputs

of0.08ps

allowsundersamplingofIFfrequencieswith

RMS

excellent noise performance.

Selectable Input Ranges: 1V to 2V

P-P

800MHz Full Power Bandwidth S/H

Optional Data Output Randomizer

Optional Clock Duty Cycle Stabilizer

Shutdown and Nap Modes

Serial SPI Port for Configuration

64-Pin (9mm × 9mm) QFN Package

DC specs include 0.3LSB INL (typ), 0.1LSB DNL (typ)

and no missing codes over temperature. The transition

noise is 0.3LSB

RMS

The digital outputs can be either full rate CMOS, double

data rate CMOS, or double data rate LVDS. A separate

output power supply allows the CMOS output swing to

range from 1.2V to 1.8V.

APPLICATIONS

–

The ENC and ENC inputs may be driven differentially

or single-ended with a sine wave, PECL, LVDS, TTL, or

CMOS inputs. An optional clock duty cycle stabilizer al-

lows high performance at full speed for a wide range of

clock duty cycles.

Communications

Cellular Base Stations

Software Defined Radios

Portable Medical Imaging

Multi-Channel Data Acquisition

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

Nondestructive Testing

TYPICAL APPLICATION

2-Tone FFT, f_IN= 70MHz and 69MHz

1.8V

–10

–20

CH 1

ANALOG

INPUT

12-BIT

D1_11

–30

–40

–50

–60

–70

S/H

•

ADC CORE

CMOS

D1_0

LVDS

D2_11

OUTPUTS

•

OUTPUT

DRIVERS

CH 2

ANALOG

INPUT

–80

–90

–100

–110

–120

12-BIT

ADC CORE

D2_0

125MHz

CLOCK

CONTROL

FREQUENCY (MHz)

21854312 TA01b

21454312 TA01a

GND

OGND

21454312p

12 3 4 5 6 7...36

中文翻译

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与LTC2143-12相关器件

型号	品牌	获取价格	描述	数据表
LTC2143-12_15	Linear	获取价格	12-Bit, 125Msps/105Msps/ 80Msps Low Power Dual ADCs
LTC2143-14	Linear	获取价格	12-Bit, 125Msps/105Msps/ 80Msps Low Power Dual ADCs
LTC2143-14	ADI	获取价格	14 位、80Msps、低功率、双通道 ADC
LTC2143-14_15	Linear	获取价格	14-Bit, 125Msps/105Msps/ 80Msps Low Power Dual ADCs
LTC2143CUP-12#PBF	Linear	获取价格	LTC2143-12 - 12-Bit, 80Msps Low Power Dual ADCs; Package: QFN; Pins: 64; Temperature Range
LTC2143CUP-12#TRPBF	Linear	获取价格	LTC2143-12 - 12-Bit, 80Msps Low Power Dual ADCs; Package: QFN; Pins: 64; Temperature Range
LTC2143CUP-14#PBF	Linear	获取价格	LTC2143-14 - 14-Bit, 80Msps Low Power Dual ADCs; Package: QFN; Pins: 64; Temperature Range
LTC2143IUP-14#PBF	Linear	获取价格	LTC2143-14 - 14-Bit, 80Msps Low Power Dual ADCs; Package: QFN; Pins: 64; Temperature Range
LTC2143IUP-14#TRPBF	Linear	获取价格	LTC2143-14 - 14-Bit, 80Msps Low Power Dual ADCs; Package: QFN; Pins: 64; Temperature Range
LTC2144-12	Linear	获取价格	12-Bit, 125Msps/105Msps/ 80Msps Low Power Dual ADCs

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