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LT1456M PDF预览

LT1456M

更新时间： 2024-01-18 13:46:53
品牌 Logo 应用领域
夏普 - SHARP 显示器光电驱动
页数 文件大小 规格书
2页 217K
描述
Dot Matrix LED Unit for Indoor/Outdoor Use(Lamp Type)

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中文翻译

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LT1456M 技术参数

生命周期：ObsoleteReach Compliance Code：unknown
风险等级：5.84Is Samacsys：N
其他特性：WITH SHIFT REGISTER/LATCH/DRIVER颜色：HIGH LUMINOSITY RED/YELLOW GREEN
配置：COMPLEX显示高度：96 mm
功能数量：1最高工作温度：65 °C
最低工作温度：-10 °C光电设备类型：16 X 16 DOT MATRIX LED DISPLAY
Base Number Matches：1

LT1456M 数据手册

 浏览型号LT1456M的Datasheet PDF文件第2页 
Dot Matrix LED Unit for Indoor/Outdoor Use LT1455M/LT1456M(Lamp Type)  
■ Features  
¡No. of dots : 16✕16dots  
¡Outline dimensions : 96.0✕96.0mm  
¡Dot size : ø5.0mm  
¡Dot pitch : 6.0mm  
¡
Radiation color : Yellow-green+Red(High-luminosity)dichromatic type  
¡Driving method : 1/8 duty dynamic drive  
LT1455M  
LT1456M  
■ Absolute Maximum Ratings  
(Ta=25˚C)  
■ Electrical Characteristics  
(VCC=5V,VLED=5V,Ta=25˚C)  
Parameter  
Symbol  
VCC  
VLED  
VI  
Rating  
-0.3 to +6.0  
-0.3 to +5.5  
-0.3 to Vcc+0.3  
1
-10 to +65  
-20 to +85  
22  
Unit  
V
V
V
ms  
˚C  
˚C  
W
Parameter  
Symbol MIN. TYP. MAX. Unit  
Supply voltage for IC  
Supply voltage for LED  
Input voltage  
Supply voltage for IC  
Supply voltage for LED  
IC current dissipation  
LED current dissipation*1  
VCC  
VLED  
ICC  
ILED  
VIL  
VIH  
IIL  
4.75  
4.5  
------  
------  
3.5  
5.0  
5.0  
15  
3.5  
------  
------  
------  
------  
------  
200  
5.25  
5.25  
40  
3.9  
------  
V
V
mA  
A
V
Turn-on time  
tON  
Operating temperature  
Storage temperature  
Power dissipation  
Topr  
Tstg  
P
Signal input voltage  
Signal input current  
------  
------  
------  
------  
125  
1.5  
0.1  
0.12  
3.0  
V
µA  
mA  
MHz  
Hz  
IIH  
fCLK  
fFR  
Clock frequency  
Frame frequency  
*1 Under the condition that dichromatic all dots are lit.  
■ Optical Characteristics  
(VCC=5V,VLED=5V,Ta=25˚C)  
400  
Parameter  
Viewing angle  
Symbol  
2θ1/2  
TYP.  
50/40  
660  
Unit  
˚
Red  
Yellow-green  
■ Timing Chart  
Peak emission wavelength  
nm  
λp  
565  
Each figure in the table is the one of LT1455M/LT1456M in sequence.  
tsu  
t WCLK  
th  
■ Luminance  
CLOCK  
Luminance is classified into 2 ranks shown below.  
RDATA  
GDATA  
(VCC=5V,VLED=5V,Ta=25˚C)  
V0(n+1) data  
tdD  
VD(n+2) data  
RDATAout  
GDATAout  
td(C-L)  
td(L-C)  
tWL  
Rank  
Radiation color  
Unit  
1
2
LATCH  
Red  
Yellow-green  
450/700  
330/700  
550/1000  
450/1000  
2
t=1/f osc  
cd/m  
Internal  
ENABLE  
ON  
OFF  
ON  
ON  
ON  
ON  
ON  
ON  
OFF  
Each figure in the table is the one of LT1455M/LT1456M in sequence.  
RENABLE  
GENABLE  
VD(n) data ON  
td(E-L)  
VD(n+1) data ON  
td(L-E)  
tWENA  
■ Terminal Functions  
VD(n)  
VD(n+1)  
td(A-E)  
ADDRESS  
(A0~A2)  
Symbol  
VLED  
VCC  
GND1  
GND2  
Connector  
Function  
Supply voltage for LED(+5V)  
Supply voltage for IC(+5V)  
Ground for IC  
td(E-A)  
Power supply  
(CN1)  
■ Block Diagram  
Ground for LED  
A0 to A2 Address specification signal for column driver  
RENABLE Controls ON/OFF of each color of LED  
GENABLE (H: LED OFF)  
Luminance adjustment circuit  
VR1 VR2  
Input/output circuit  
473 331  
HC367  
Serial data input for red(H=ON, L=OFF)  
RDATA  
Shift from up to down in the unit  
HD16/HD31/HD0/HD15  
OSC  
MONO-MULTI  
HC123  
Serial data input for yellow-green(H=ON, L=OFF)  
GDATA Shift from up to down in the unit  
Input signal  
(CN2)  
OUT  
A0  
A1  
A2  
RENABLE  
RDATA  
GDATA  
LATCH  
A0  
A1  
A2  
RENABLE  
RDATA  
GDATA  
LATCH  
HD16/HD31/HD0/HD15  
Latch signal of display data H: Serial data is converted  
to parallel data.L: Contents are latched.  
GENABLE  
CLOCK  
GENABLE  
CLOCK  
LATCH  
3 TO 8 DECODER  
Clock signal for data transmission in the shift-  
register.(L/H: serial data is shifted.)  
CLOCK  
GND1  
PNP DRIVER  
Ground for signal (Connected to ground for IC)  
VD0  
VD15  
A0 to A2 Buffered input signal  
RENABLE Buffered input signal  
HD16  
HD0  
16✕16 DOT  
RDATA  
Input signal generated through 32-bit shift register  
LED  
Output signal  
(CN3)  
HD31  
HD16  
HD15  
HD0  
GDATA  
LATCH  
GENABLE Buffered input signal  
CLOCK  
GND1  
Input signal generated through 32-bit shift register  
Buffered input signal  
DICHROMATIC  
MATRIX  
Buffered input signal  
Ground for signal (Connected to ground for IC)  
HD31  
HD15  
Each signal is used as input signal for next unit.  
* As for the terminal number, refer to the outline dimensions  
¡
In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP  
66 (Notice)  
devices shown in catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.  
(Internet) ¡Data for sharp's optoelectronic/power device is provided for internet.(Address http://www.sharp.co.jp/ecg/)  
12

中文翻译

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