Datasheet > LSH32JC32

LSH32JC32

更新时间： 2024-09-23 22:11:59

品牌	Logo	应用领域
逻辑 - LOGIC		/
页数	文件大小	规格书
9页	204K
描述
32-bit Cascadable Barrel Shifter

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LSH32JC32 数据手册

LSH32

DEVICES INCORPORATED

32-bit Cascadable Barrel Shifter

LSH32

32-bit Cascadable Barrel Shifter

DEVICES INCORPORATED

FEATURES

DESCRIPTION

The LSH32 is a 32-bit high speed

shifter designed for use in floating

point normalization, word pack/

unpack, field extraction, and similar

applications. It has 32 data inputs,

and 16 output lines. Any shift

configured such that any contiguous

16-bit field (including wraparound of

the 32 inputs) may be presented to the

output pins under control of the shift

code field (wrap mode). Alterna-

tively, the wrap feature may be

❑ 32-bit Input, 32-bit Output Multi-

plexed to 16 Lines

❑ Full 0-31 Position Barrel Shift

Capability

❑ Integral Priority Encoder for 32-bit

Floating Point Normalization

configuration of the 32 inputs, includ- disabled, resulting in zero or sign bit

ing circular (barrel) shifting, left shifts fill, as appropriate (fill mode). The

with zero fill, and right shift with sign shift code control assignments and the

❑ Sign-Magnitude or Two’s Comple-

ment Mantissa Representation

❑ 32-bit Linear Shifts with Sign or

extend are possible. In addition, a

built-in priority encoder is provided

to aid floating point normalization.

resulting input to output mapping for

the wrap mode are shown in Table 1.

Zero Fill

❑ Independent Priority Encoder

Outputs for Block Floating Point

Essentially the LSH32 is configured as

a left shift device. That is, a shift code

of 00000²results in no shift of the

input field. A code of 000012 provides

an effective left shift of 1 position, etc.

When viewed as a right shift, the shift

code corresponds to the two’s com-

plement of the shift distance, i.e., a

shift code of 11111²(–110) results in a

right shift of one position, etc.

❑ 68-pinPLCC, J-Lead

SHIFT ARRAY

The 32 inputs to the LSH32 are

applied to a 32-bit shift array. The 32

outputs of this array are multiplexed

down to 16 lines for presentation at

the device outputs. The array may be

LSH32 BLOCK DIAGRAM

When not in the wrap mode, the

LSH32 fills bit positions for which

there is no corresponding input bit.

The fill value and the positions filled

depend on the RIGHT/LEFT (R/L)

direction pin. This pin is a don’t care

input when in wrap mode. For left

shifts in fill mode, lower bits are filled

with zero as shown in Table 2. For

right shifts, however, the SIGN input

is used as the fill value. Table 3

SIGN

I31-I0

32:5

PRIORITY

ENCODE

32-bit

BARREL

SHIFT

SI4-SI0

depicts the bits to be filled as a

function of shift code for the right shift

case. Note that the R/L input changes

only the fill convention, and does not

affect the definition of the shift code.

RIGHT/LEFT

FILL/WRAP

ARRAY

NORM

In fill mode, as in wrap mode, the shift

code input represents the number of

shift positions directly for left shifts,

but the two’s complement of the shift

code results in the equivalent right

shift. However, for fill mode the R/L

input can be viewed as the most

2:1

-SO

15-Y

OE MS/LS

Special Arithmetic Functions

08/16/2000–LDS.32-Q

12 3 4 5 6 7...9

中文翻译

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与LSH32JC32相关器件

型号	品牌	获取价格	描述	数据表
LSH32JC42	LOGIC	获取价格	Barrel Shifter, 32-Bit, CMOS, PQCC68, 0.990 X 0.990 INCH, PLASTIC, MO-047-AE, LCC-68
LSH32KC20	ETC	获取价格	Shifter
LSH32KC32	ETC	获取价格	Shifter
LSH32KC42	LOGIC	获取价格	Barrel Shifter, 32-Bit, CMOS, CQCC68, 0.950 X 0.950 INCH, CERAMIC, LCC-68
LSH32KM30	ETC	获取价格	Shifter
LSH32KM40	LOGIC	获取价格	Barrel Shifter, 32-Bit, CMOS, CQCC68, 0.950 X 0.950 INCH, CERAMIC, LCC-68
LSH32KM50	LOGIC	获取价格	Barrel Shifter, 32-Bit, CMOS, CQCC68, 0.950 X 0.950 INCH, CERAMIC, LCC-68
LSH32KMB30	LOGIC	获取价格	Barrel Shifter, 32-Bit, CMOS, CQCC68, 0.950 X 0.950 INCH, CERAMIC, LCC-68
LSH32KMB40	LOGIC	获取价格	Barrel Shifter, 32-Bit, CMOS, CQCC68, 0.950 X 0.950 INCH, CERAMIC, LCC-68
LSH32KMB50	LOGIC	获取价格	Barrel Shifter, 32-Bit, CMOS, CQCC68, 0.950 X 0.950 INCH, CERAMIC, LCC-68

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