LS3550A
MONOLITHIC DUAL
PNP TRANSISTOR
Linear Systems Monolithic Dual PNP Transistor
FEATURES
The LS3550A is a monolithic pair of PNP transistors
EXCELLENT THERMAL TRACKING
TIGHT VBE MATCHING
≤3µV/°C
|VBE1 – VBE2 |≤2mV
mounted in a single P-DIP package. The monolithic
dual chip design reduces parasitics and gives better
performance while ensuring extremely tight matching.
ABSOLUTE MAXIMUM RATINGS 1
@ 25°C (unless otherwise noted)
The 8 Pin P-DIP provides ease of manufacturing, and
the symmetrical pinout prevents improper orientation.
Maximum Temperatures
Storage Temperature
‐65°C to +150°C
(See Packaging Information).
Operating Junction Temperature
Maximum Power Dissipation
Continuous Power Dissipation
Maximum Currents
Collector Current
Maximum Voltages
‐55°C to +150°C
LS3550A Features:
TBD
10mA
80V
Tight matching
Low Output Capacitance
Collector to Collector Voltage
MATCHING CHARACTERISTICS @ 25°C (unless otherwise stated)
SYMBOL
|VBE1 – VBE2
CHARACTERISTIC
Base Emitter Voltage Differential
MIN
‐‐
TYP
‐‐
MAX
2
UNITS
mV
CONDITIONS
|
IC = ‐10mA, VCE = ‐5V
∆|(VBE1 – VBE2)| / ∆T
Base Emitter Voltage Differential
Change with Temperature
Base Current Differential
‐‐
‐‐
3
µV/°C
IC = ‐10mA, VCE = ‐5V
TA = ‐40°C to +85°C
IC = ‐10µA, VCE = ‐5V
|IB1 – IB2
|
‐‐
‐‐
‐‐
‐‐
10
nA
|∆ (IB1 – IB2)|/∆T
Base Current Differential
Change with Temperature
DC Current Gain Differential
0.5
nA/°C
IC = ‐10µA, VCE = ‐5V
TA = ‐40°C to +85°C
IC = 10µA, VCE = 5V
hFE1 /hFE2
‐‐
‐‐
10
%
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
SYMBOL
BVCBO
BVCEO
BVEBO
BVCCO
CHARACTERISTICS
MIN.
‐45
TYP.
‐‐
MAX.
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐0.25
‐0.2
‐0.2
2
2
‐1
UNITS
V
V
V
V
CONDITIONS
IC = 10µA, IE = 0
IC = 10µA, IB = 0
IE = 10µA, IC = 02
IC = 10µA, IE = 0
Collector to Base Voltage
Click To Buy
Collector to Emitter Voltage
Emitter‐Base Breakdown Voltage
Collector to Collector Voltage
‐45
‐6.2
‐80
150
120
100
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
IC = ‐1mA, VCE = ‐5V
IC = ‐10mA, VCE = ‐5V
IC = ‐100mA, VCE = ‐5V
IC = ‐100mA, IB = ‐10mA
IE = 0, VCB = ‐3V
IE = 0, VCB = ‐30V
IE = 0, VCB = ‐10V
VCC = 0V
VCC = ±80V
IC = ‐1mA, VCE = ‐5V
hFE
DC Current Gain
VCE(SAT)
IEBO
ICBO
COBO
CC1C2
IC1C2
fT
Collector Saturation Voltage
Emitter Cutoff Current
Collector Cutoff Current
V
nA
nA
pF
pF
nA
MHz
Output Capacitance
Collector to Collector Capacitance
Collector to Collector Leakage Current
Current Gain Bandwidth
Product(Current)
‐‐
‐‐
600
NF
Narrow Band Noise Figure
‐‐
‐‐
3
dB
IC = ‐100µA, VCE = ‐5V, BW=200Hz, RG= 10Ω,
f = 1KHz
Notes:
1. Absolute Maximum ratings are limiting values above which serviceability may be impaired
2. The reverse base‐to‐emitter voltage must never exceed 6.2 volts; the reverse base‐to‐emitter current must never exceed 10µA.
P-DIP (Top View)
Available Packages:
LS3550A in P-DIP
LS3550A available as bare die
Please contact Micross for full package and die dimensions:
Email: chipcomponents@micross.com
Web: www.micross.com/distribution.aspx
Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or
other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.
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