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LR24C256 PDF预览

LR24C256

更新时间: 2024-10-20 01:18:39
品牌 Logo 应用领域
乐山 - LRC /
页数 文件大小 规格书
14页 607K
描述
Bi-directional Data Transfer Protocol

LR24C256 数据手册

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LESHAN RADIO COMPANY, LTD.  
128K bits (16,384 X 8) / 256K bits (32,768 X 8) Two-wire Serial EEPROM  
Two-wire Serial EEPROM  
LR 24C128/LR 24C256  
Features  
Two-wire Serial Interface  
VCC = 1.8V to 5.5V  
Bi-directional Data Transfer Protocol  
Internally Organized  
LR24C128, 16,384 X 8 (128K bits)  
LR24C256, 32,768 X 8 (256K bits)  
400 kHz (1.8V, 2.7V, 5V) Compatibility  
64-byte Page (128K/256K) Write Modes  
Partial Page Writes Allowed  
Self-timed Write Cycle (5 ms max)  
High-reliability  
1 Million Write Cycles guaranteed  
Data Retention > 100 Years  
Operating Temperature: -40  
to +85  
8-lead PDIP, 8-lead SOP and 8-lead TSSOP Packages  
Pin Configuration  
Ordering Infomation  
LR24Cxxx: PDIP8  
LR24CxxxD: SOP8  
LR24CxxxT: TSSOP8  
Description  
LR24C128/LR24C256 provides 131,072/262,144 bits of serial electrically erasable and  
programmable read-only memory (EEPROM) organized as 16,384/32,768 words of 8 bits each.  
The device is optimized for use in many industrial and commercial applications where  
low-power and low-voltage operations are essential. The LR24C128/LR24C256 is available in  
space-saving 8-lead PDIP, 8-lead SOP, and 8-lead TSSOP packages and is accessed via a  
two-wire serial interface.  
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