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LPC662IMDC PDF预览

LPC662IMDC

更新时间: 2024-11-23 13:09:27
品牌 Logo 应用领域
美国国家半导体 - NSC 运算放大器
页数 文件大小 规格书
16页 588K
描述
IC DUAL OP-AMP, 6000 uV OFFSET-MAX, 0.35 MHz BAND WIDTH, UUC, WAFER, Operational Amplifier

LPC662IMDC 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:WAFER包装说明:DIE, DIE OR CHIP
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.33.00.01风险等级:5.67
Is Samacsys:N放大器类型:OPERATIONAL AMPLIFIER
架构:VOLTAGE-FEEDBACK标称共模抑制比:83 dB
频率补偿:YES最大输入失调电压:6000 µV
JESD-30 代码:X-XUUC-N低-偏置:YES
低-失调:NO微功率:YES
湿度敏感等级:1负供电电压上限:
标称负供电电压 (Vsup):功能数量:2
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:DIE
封装等效代码:DIE OR CHIP封装形状:UNSPECIFIED
封装形式:UNCASED CHIP峰值回流温度(摄氏度):260
电源:5/15 V认证状态:Not Qualified
最小摆率:0.03 V/us标称压摆率:0.11 V/us
子类别:Operational Amplifiers最大压摆率:0.16 mA
供电电压上限:16 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:NO LEAD
端子位置:UPPER处于峰值回流温度下的最长时间:40
标称均一增益带宽:350 kHz最小电压增益:40000
Base Number Matches:1

LPC662IMDC 数据手册

 浏览型号LPC662IMDC的Datasheet PDF文件第2页浏览型号LPC662IMDC的Datasheet PDF文件第3页浏览型号LPC662IMDC的Datasheet PDF文件第4页浏览型号LPC662IMDC的Datasheet PDF文件第5页浏览型号LPC662IMDC的Datasheet PDF文件第6页浏览型号LPC662IMDC的Datasheet PDF文件第7页 
March 1998  
LPC662  
Low Power CMOS Dual Operational Amplifier  
n Long-term integrator  
General Description  
n High-impedance preamplifier  
The LPC662 CMOS Dual operational amplifier is ideal for  
n Active filter  
operation from a single supply. It features a wide range of  
operating voltage from +5V to +15V, rail-to-rail output swing  
in addition to an input common-mode range that includes  
n Sample-and-Hold circuit  
n Peak detector  
ground. Performance limitations that have plagued CMOS  
amplifiers in the past are not a problem with this design. In-  
put VOS, drift, and broadband noise as well as voltage gain  
(into 100 kand 5 k) are all equal to or better than widely  
accepted bipolar equivalents, while the power supply re-  
quirement is typically less than 0.5 mW.  
Features  
n Rail-to-rail output swing  
<
n Micropower operation ( 0.5 mW)  
n Specified for 100 kand 5 kloads  
n High voltage gain  
n Low input offset voltage  
n Low offset voltage drift  
n Ultra low input bias current  
n Input common-mode includes GND  
n Operating range from +5V to +15V  
n Low distortion  
120 dB  
3 mV  
1.3 µV/˚C  
2 fA  
This chip is built with National’s advanced Double-Poly  
Silicon-Gate CMOS process.  
See the LPC660 datasheet for a Quad CMOS operational  
amplifier and LPC661 for a single CMOS operational ampli-  
fier with these same features.  
0.01% at 1 kHz  
0.11 V/µs  
Applications  
n High-impedance buffer  
n Precision current-to-voltage converter  
n Slew rate  
n Full military temperature range available  
Connection Diagram  
8-Pin DIP/SO  
DS010548-1  
Top View  
Ordering Information  
Package  
Temperature Range  
NSC  
Transport  
Media  
Drawing  
Military  
Industrial  
8-Pin  
Side Brazed  
Ceramic DIP  
8-Pin  
LPC662AMD  
D08C  
Rail  
LPC662AIM  
or LPC662IM  
LPC662AIN  
or LPC662IN  
M08A  
N08E  
J08A  
Rail  
Tape and Reel  
Rail  
Small Outline  
8-Pin  
Molded DIP  
8-Pin  
LPC662AMJ/883  
DS010548  
Rail  
Ceramic DIP  
© 1999 National Semiconductor Corporation  
www.national.com  

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