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LPC2366FBD100-S PDF预览

LPC2366FBD100-S

更新时间： 2024-10-26 19:40:11
品牌 Logo 应用领域
恩智浦 - NXP 微控制器
页数 文件大小 规格书
52页 267K
描述
IC,MICROCONTROLLER,32-BIT,ARM7 CPU,QFP,100PIN,PLASTIC

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中文翻译

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LPC2366FBD100-S 技术参数

是否Rohs认证： 符合生命周期：Obsolete
包装说明：QFP, QFP100,.63SQ,20Reach Compliance Code：unknown
风险等级：5.84位大小：32
CPU系列：ARM7JESD-30 代码：S-PQFP-G100
端子数量：100最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：QFP封装等效代码：QFP100,.63SQ,20
封装形状：SQUARE封装形式：FLATPACK
电源：3.3 V认证状态：Not Qualified
RAM（字节）：59392ROM（单词）：262144
ROM可编程性：FLASH速度：72 MHz
子类别：Microcontrollers最大压摆率：100 mA
标称供电电压：3.3 V表面贴装：YES
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
Base Number Matches：1

LPC2366FBD100-S 数据手册

 浏览型号LPC2366FBD100-S的Datasheet PDF文件第2页浏览型号LPC2366FBD100-S的Datasheet PDF文件第3页浏览型号LPC2366FBD100-S的Datasheet PDF文件第4页浏览型号LPC2366FBD100-S的Datasheet PDF文件第5页浏览型号LPC2366FBD100-S的Datasheet PDF文件第6页浏览型号LPC2366FBD100-S的Datasheet PDF文件第7页 
LPC2364/65/66/67/68  
Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash  
with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC  
Rev. 04 — 17 April 2008  
Product data sheet  
1. General description  
The LPC2364/65/66/67/68 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S  
CPU with real-time emulation that combines the microcontroller with up to 512 kB of  
embedded high-speed flash memory. A 128-bit wide memory interface and a unique  
accelerator architecture enable 32-bit code execution at the maximum clock rate. For  
critical performance in interrupt service routines and DSP algorithms, this increases  
performance up to 30 % over Thumb mode. For critical code size applications, the  
alternative 16-bit Thumb mode reduces code by more than 30 % with minimal  
performance penalty.  
The LPC2364/65/66/67/68 are ideal for multi-purpose serial communication applications.  
They incorporate a 10/100 Ethernet Media Access Controller (MAC), USB full speed  
device with 4 kB of endpoint RAM (LPC2364/66/68 only), four UARTs, two CAN channels  
(LPC2364/66/68 only), an SPI interface, two Synchronous Serial Ports (SSP), three I2C  
interfaces, and an I2S interface. This blend of serial communications interfaces combined  
with an on-chip 4 MHz internal oscillator, SRAM of up to 32 kB, 16 kB SRAM for Ethernet,  
8 kB SRAM for USB and general purpose use, together with 2 kB battery powered SRAM  
make these devices very well suited for communication gateways and protocol converters.  
Various 32-bit timers, an improved 10-bit ADC, 10-bit DAC, one PWM unit, a CAN control  
unit (LPC2364/66/68 only), and up to 70 fast GPIO lines with up to 12 edge or level  
sensitive external interrupt pins make these microcontrollers particularly suitable for  
industrial control and medical systems.  
2. Features  
I ARM7TDMI-S processor, running at up to 72 MHz.  
I Up to 512 kB on-chip flash program memory with In-System Programming (ISP) and  
In-Application Programming (IAP) capabilities. Flash program memory is on the ARM  
local bus for high performance CPU access.  
I 8 kB/32 kB of SRAM on the ARM local bus for high performance CPU access.  
I 16 kB SRAM for Ethernet interface. Can also be used as general purpose SRAM.  
I 8 kB SRAM for general purpose DMA use also accessible by the USB.  
I Dual Advanced High-performance Bus (AHB) system that provides for simultaneous  
Ethernet DMA, USB DMA, and program execution from on-chip flash with no  
contention between those functions. A bus bridge allows the Ethernet DMA to access  
the other AHB subsystem.  
I Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts.  
I General Purpose DMA controller (GPDMA) on AHB that can be used with the SSP  
serial interfaces, the I2S port, and the Secure Digital/MultiMediaCard (SD/MMC) card  
port, as well as for memory-to-memory transfers.  
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