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LMX2525LQ1321/NOPB PDF预览

LMX2525LQ1321/NOPB

更新时间： 2024-09-23 20:52:03
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德州仪器 - TI /
页数 文件大小 规格书
18页 241K
描述
PLL FREQUENCY SYNTHESIZER, 26MHz, QCC24, 5 X 4 MM, 0.75 MM HEIGHT, LLP-24

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LMX2525LQ1321/NOPB 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：QFN
包装说明：VQCCN, LCC24,.16X.2,20针数：24
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.67模拟集成电路 - 其他类型：PLL FREQUENCY SYNTHESIZER
JESD-30 代码：R-XQCC-N24JESD-609代码：e3
长度：5 mm湿度敏感等级：2
功能数量：1端子数量：24
最高工作温度：85 °C最低工作温度：-30 °C
封装主体材料：UNSPECIFIED封装代码：VQCCN
封装等效代码：LCC24,.16X.2,20封装形状：RECTANGULAR
封装形式：CHIP CARRIER, VERY THIN PROFILE峰值回流温度（摄氏度）：260
电源：2.8 V认证状态：Not Qualified
座面最大高度：0.8 mm子类别：PLL or Frequency Synthesis Circuits
最大供电电流 (Isup)：16.8 mA最大供电电压 (Vsup)：3.3 V
最小供电电压 (Vsup)：2.5 V标称供电电压 (Vsup)：2.8 V
表面贴装：YES温度等级：OTHER
端子面层：Matte Tin (Sn)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：40宽度：4 mm
Base Number Matches：1

LMX2525LQ1321/NOPB 数据手册

 浏览型号LMX2525LQ1321/NOPB的Datasheet PDF文件第2页浏览型号LMX2525LQ1321/NOPB的Datasheet PDF文件第3页浏览型号LMX2525LQ1321/NOPB的Datasheet PDF文件第4页浏览型号LMX2525LQ1321/NOPB的Datasheet PDF文件第5页浏览型号LMX2525LQ1321/NOPB的Datasheet PDF文件第6页浏览型号LMX2525LQ1321/NOPB的Datasheet PDF文件第7页 
OBSOLETE  
LMX2525  
www.ti.com  
SNWS012B –MAY 2004–REVISED MAY 2004  
LMX2525 PLLatinum™ Dual Frequency Synthesizer System with Integrated VCOs  
Check for Samples: LMX2525  
1
FEATURES  
APPLICATIONS  
23  
•
Small Size  
5.0 mm X 4.0 mm X 0.75 mm 24-Pin WQFN  
Package  
RF Synthesizer System  
•
Japan PDC Systems at 800 MHz and 1500 MHz  
Frequency Bands  
–
DESCRIPTION  
•
LMX2525 is a highly integrated, high performance,  
low power frequency synthesizer system optimized  
for dual-band Japan PDC mobile handsets. Using a  
proprietary digital phase locked loop technique,  
LMX2525 generates very stable, low noise local  
oscillator signals for up and down conversion in  
wireless communications devices.  
–
–
–
Two Integrated VCOs  
Integrated Loop Filter  
Low Spurious, Low Phase Noise Fractional-  
N RF PLL Based on 10-Bit Delta Sigma  
Modulator  
–
Frequency Resolution Down to 20 kHz  
LMX2525 includes dual voltage controlled oscillators  
(VCOs) for the upper and lower Japan PDC  
frequency bands, a loop filter, and a fractional-N RF  
PLL based on a delta sigma modulator. In concert,  
these blocks form a closed loop RF synthesizer  
system. The RF synthesizer system supports two  
frequency bands: PDC1500 and PDC800.  
•
Supports Various Reference Frequencies  
12.6 MHz, 14.4 MHz, 25.2MHz, and 26.0 MHz  
–
•
•
Fast Lock Time: 300 µs  
Low Current Consumption  
–
10 mA at 2.8 V in PDC800 Mode  
•
•
•
2.5 V to 3.3 V Operation  
Serial data is transferred to the device via a three-  
wire MICROWIRE interface (DATA, LE, CLK).  
Digital Filtered Lock Detect Output  
Hardware and Software Power Down Control  
Operating supply voltage ranges from 2.5 V to 3.3 V.  
LMX2525 features low current consumption: 10 mA at  
2.8 V when operating in the PDC800 mode.  
LMX2525 is available in a 24-pin WQFN package.  
Functional Block Diagram  
RF R  
Divider  
RF  
Phase  
Detector  
OSCin  
Loop  
Filter  
RF1out  
RF1 VCO  
RF2out  
V
V
CC  
DD  
RF2 VCO  
Power  
Down  
CE  
Control  
CLK  
DATA  
LE  
RF N/(N+1)  
Divider  
Serial  
Interface  
Band  
Select  
Lock  
Detect  
Delta Sigma  
Control  
LD  
BS  
GND  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PLLatinum is a trademark of Texas Instruments.  
2
3
All other trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2004, Texas Instruments Incorporated  
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